Patents by Inventor Kapil Kumar Tyagi
Kapil Kumar Tyagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11742799Abstract: A voltage controlled oscillator (VCO) has a VCO core and a tuning bank. The tuning bank includes first and second tuning capacitors. A main switch is coupled between the first and second tuning capacitors. The tuning bank also includes control switches that receive a control signal to selectively activate the tuning bank. The main switch receives a level-shifted control signal to activate the tuning bank.Type: GrantFiled: May 20, 2022Date of Patent: August 29, 2023Assignee: STMicroelectronics International N.V.Inventor: Kapil Kumar Tyagi
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Publication number: 20220385234Abstract: A voltage controlled oscillator (VCO) has a VCO core and a tuning bank. The tuning bank includes first and second tuning capacitors. A main switch is coupled between the first and second tuning capacitors. The tuning bank also includes control switches that receive a control signal to selectively activate the tuning bank. The main switch receives a level-shifted control signal to activate the tuning bank.Type: ApplicationFiled: May 20, 2022Publication date: December 1, 2022Applicant: STMicroelectronics International N.V.Inventor: Kapil Kumar TYAGI
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Patent number: 11474546Abstract: A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO.Type: GrantFiled: September 4, 2020Date of Patent: October 18, 2022Assignee: STMicroelectronics International N.V.Inventors: Kapil Kumar Tyagi, Nitin Gupta
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Patent number: 10911053Abstract: A PLL includes a phase frequency detector (PFD) receiving an input signal and feedback signal, and producing a control signal. A charge pump receives the control signal and produces an initial VCO control. A loop filter generates a fine VCO control and intermediate output based upon the initial VCO control. A coarse control circuit includes an integrator having a first input receiving the intermediate output, a second input, and generating a coarse VCO control, a first switch coupling a reference voltage to the second input, a buffer buffering output of the integrator, and a second switch coupling output of the integrator to the second input of the integrator. A VCO receives the fine VCO control and the coarse VCO control, and generates an output signal having a frequency based thereupon. A feedback path receives the output signal and produces the feedback signal.Type: GrantFiled: April 30, 2018Date of Patent: February 2, 2021Assignee: STMicroelectronics International N.V.Inventors: Nitin Gupta, Kapil Kumar Tyagi
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Publication number: 20200401169Abstract: A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO.Type: ApplicationFiled: September 4, 2020Publication date: December 24, 2020Applicant: STMicroelectronics International N.V.Inventors: Kapil Kumar TYAGI, Nitin GUPTA
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Patent number: 10795389Abstract: An electronic device including a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device. A method for operating the device to switch into a power on mode includes: turning on the low dropout regulator, removing a DC bias from the second conduction terminal of the transistor, and turning on the transistor. A method for operating the device to switch into a power down mode includes: turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the low dropout regulator.Type: GrantFiled: December 12, 2018Date of Patent: October 6, 2020Assignee: STMicroelectronics International N.V.Inventors: Kapil Kumar Tyagi, Nitin Gupta
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Publication number: 20190334530Abstract: A PLL includes a phase frequency detector (PFD) receiving an input signal and feedback signal, and producing a control signal. A charge pump receives the control signal and produces an initial VCO control. A loop filter generates a fine VCO control and intermediate output based upon the initial VCO control. A coarse control circuit includes an integrator having a first input receiving the intermediate output, a second input, and generating a coarse VCO control, a first switch coupling a reference voltage to the second input, a buffer buffering output of the integrator, and a second switch coupling output of the integrator to the second input of the integrator. A VCO receives the fine VCO control and the coarse VCO control, and generates an output signal having a frequency based thereupon. A feedback path receives the output signal and produces the feedback signal.Type: ApplicationFiled: April 30, 2018Publication date: October 31, 2019Applicant: STMicroelectronics International N.V.Inventors: Nitin GUPTA, Kapil Kumar TYAGI
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Publication number: 20190113943Abstract: An electronic device including a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device. A method for operating the device to switch into a power on mode includes: turning on the low dropout regulator, removing a DC bias from the second conduction terminal of the transistor, and turning on the transistor. A method for operating the device to switch into a power down mode includes: turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the low dropout regulator.Type: ApplicationFiled: December 12, 2018Publication date: April 18, 2019Applicant: STMicroelectronics International N.V.Inventors: Kapil Kumar TYAGI, Nitin GUPTA
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Patent number: 10198014Abstract: A low dropout regulator produces output at an intermediate node. A resistive divider is coupled between the intermediate node and ground and provides a feedback signal to the low dropout regulator. A transistor has a first conduction terminal coupled to the intermediate node and a second conduction terminal coupled to an output node. A first impedance is coupled to the output node, a first switch selectively couples the first impedance to a supply node, a second impedance coupled to the output node, and a second switch selectively couples the second impedance to a ground node. Control circuitry is coupled to the control terminal of the transistor and to control terminals of the first and second switches. The control circuitry switches the electronic device to a power down mode by turning off transistor, closing the first and second switches, and turning off the low dropout regulator.Type: GrantFiled: March 31, 2017Date of Patent: February 5, 2019Assignee: STMicroelectronics International N.V.Inventors: Kapil Kumar Tyagi, Nitin Gupta
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Publication number: 20180284822Abstract: A low dropout regulator produces output at an intermediate node. A resistive divider is coupled between the intermediate node and ground and provides a feedback signal to the low dropout regulator. A transistor has a first conduction terminal coupled to the intermediate node and a second conduction terminal coupled to an output node. A first impedance is coupled to the output node, a first switch selectively couples the first impedance to a supply node, a second impedance coupled to the output node, and a second switch selectively couples the second impedance to a ground node. Control circuitry is coupled to the control terminal of the transistor and to control terminals of the first and second switches. The control circuitry switches the electronic device to a power down mode by turning off transistor, closing the first and second switches, and turning off the low dropout regulator.Type: ApplicationFiled: March 31, 2017Publication date: October 4, 2018Applicant: STMicroelectronics International N.V.Inventors: Kapil Kumar Tyagi, Nitin Gupta