Patents by Inventor Kapil Verma
Kapil Verma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10089021Abstract: Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. An integrated circuit chip comprising non-volatile memory, the integrated circuit chip configured to, determine a number of portions into which a storage operation is to be split; pause execution of the storage operation from within the integrated circuit chip according to the determined number of portions; execute one or more other storage operations on the integrated circuit chip while the storage operation is paused, each of the one or more other storage operations having a shorter duration than the storage operation; and continue the paused storage operation in response to a trigger.Type: GrantFiled: March 22, 2018Date of Patent: October 2, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Jea Hyun, James Peterson, Long Pham, John Strasser, Hairong Sun, Kapil Verma
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Publication number: 20180210661Abstract: Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. An integrated circuit chip comprising non-volatile memory, the integrated circuit chip configured to, determine a number of portions into which a storage operation is to be split; pause execution of the storage operation from within the integrated circuit chip according to the determined number of portions; execute one or more other storage operations on the integrated circuit chip while the storage operation is paused, each of the one or more other storage operations having a shorter duration than the storage operation; and continue the paused storage operation in response to a trigger.Type: ApplicationFiled: March 22, 2018Publication date: July 26, 2018Applicant: SanDisk Technologies LLCInventors: Jea Hyun, James Peterson, Long Pham, John Strasser, Hairong Sun, Kapil Verma
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Patent number: 9933950Abstract: Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. A frequency module is configured to determine a frequency for pausing a storage operation. An interrupt module is configured to pause execution of a storage operation according to a determined frequency. A resume module is configured to continue a paused storage operation in response to a trigger.Type: GrantFiled: March 12, 2015Date of Patent: April 3, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Jea Hyun, James Peterson, Long Pham, John Strasser, Hairong Sun, Kapil Verma
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Publication number: 20180061505Abstract: Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region is a common source line that includes one or more local source lines and one or more global source lines. If the leakage current were to become high enough, the electrical short between the conductive region and the block select line could cause a plane level failure. If the leakage current is less than an amount that would cause a plane failure, but that indicates that the non-volatile memory device is susceptible to a plane failure, data may be moved out of the plane before the plane failure occurs. Thus, data loss may be prevented.Type: ApplicationFiled: August 24, 2016Publication date: March 1, 2018Applicant: SanDisk Technologies LLCInventors: Ashish Ghai, Lakshmi Kalpana Vakati, Ekamdeep Singh, Chang Siau, Gopinath Balakrishnan, Kapil Verma
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Patent number: 9905307Abstract: Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region is a common source line that includes one or more local source lines and one or more global source lines. If the leakage current were to become high enough, the electrical short between the conductive region and the block select line could cause a plane level failure. If the leakage current is less than an amount that would cause a plane failure, but that indicates that the non-volatile memory device is susceptible to a plane failure, data may be moved out of the plane before the plane failure occurs. Thus, data loss may be prevented.Type: GrantFiled: August 24, 2016Date of Patent: February 27, 2018Assignee: SanDisk Technologies LLCInventors: Ashish Ghai, Lakshmi Kalpana Vakati, Ekamdeep Singh, Chang Siau, Gopinath Balakrishnan, Kapil Verma
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Patent number: 9536617Abstract: Systems and methods for reducing peak power supply current in a non-volatile memory system that includes a plurality of memory die are described. In some cases, prior to a first memory die of the plurality of memory die performing a particular memory operation (e.g., a programming operation), the first memory die may poll other memory die of the plurality of memory die to determine a total peak power supply current for the plurality of memory die. In response to detecting that the total peak power supply current for the plurality of memory die is at or above a peak current threshold (e.g., more than 200 mA), the first memory die may delay the performance of the particular memory operation or slow down the performance of the particular memory operation.Type: GrantFiled: October 30, 2015Date of Patent: January 3, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Ali Al-Shamma, Farookh Moogat, Chang Siau, Grishma Shah, Kenneth Louie, Khanh Nguyen, Kapil Verma
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Patent number: 9472298Abstract: Determining dynamic read levels for memory cells is disclosed. A group of memory cells may be read at a pair of reference levels. Results of reading the group at the pair of reference levels are compared while the group is read at a different reference level. By comparing the results of reading the group at the pair of reference levels while reading the group at a different reference level, time is saved. Note that the reading and comparing can be repeated for other pairs of reference levels. The storage device may determine an adjusted read level based on the comparisons of the results for the different pairs of reference levels. The memory cells may be read at a set of reference levels. A voltage on a word line is not back down to ground between the reads in one aspect, which saves considerable time.Type: GrantFiled: October 26, 2015Date of Patent: October 18, 2016Assignee: SanDisk Technologies LLCInventors: Kenneth Louie, Chang Siau, Gopinath Balakrishnan, Kapil Verma, Grishma Shah
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Publication number: 20160293264Abstract: Systems and methods for reducing peak power supply current in a non-volatile memory system that includes a plurality of memory die are described. In some cases, prior to a first memory die of the plurality of memory die performing a particular memory operation (e.g., a programming operation), the first memory die may poll other memory die of the plurality of memory die to determine a total peak power supply current for the plurality of memory die. In response to detecting that the total peak power supply current for the plurality of memory die is at or above a peak current threshold (e.g., more than 200 mA), the first memory die may delay the performance of the particular memory operation or slow down the performance of the particular memory operation.Type: ApplicationFiled: October 30, 2015Publication date: October 6, 2016Applicant: SANDISK TECHNOLOGIES INC.Inventors: Ali Al-Shamma, Farookh Moogat, Chang Siau, Grishma Shah, Kenneth Louie, Khanh Nguyen, Kapil Verma
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Publication number: 20160210050Abstract: Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. A frequency module is configured to determine a frequency for pausing a storage operation. An interrupt module is configured to pause execution of a storage operation according to a determined frequency. A resume module is configured to continue a paused storage operation in response to a trigger.Type: ApplicationFiled: March 12, 2015Publication date: July 21, 2016Inventors: Jea Hyun, James Peterson, Long Pham, John Strasser, Hairong Sun, Kapil Verma