Patents by Inventor Kapu Sirish Reddy
Kapu Sirish Reddy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240030028Abstract: Provided herein are methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate by providing a wide gap electrode spacing in low-pressure conditions. A wide gap electrode may facilitate control of parasitic plasmas in low-pressure conditions, thereby enabling formation of high selectivity, low stress, and low-hydrogen AHMs. The AHM may then be used to etch features into underlying layers of the substrate.Type: ApplicationFiled: December 13, 2021Publication date: January 25, 2024Inventors: Abbin Antony, Xin Meng, Xinyi Chen, Sreeram Sonti, Kapu Sirish Reddy
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Patent number: 11869770Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: GrantFiled: July 29, 2021Date of Patent: January 9, 2024Assignee: Lam Research CorporationInventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Publication number: 20230357921Abstract: Provided herein are methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate at high temperatures using an additive that reduces a competing etch process. Sulfur hexafluoride may be used to improve the deposition rate of the AHM with minimal changes to the properties of the resulting film.Type: ApplicationFiled: September 27, 2021Publication date: November 9, 2023Inventors: Matthew Scott Weimer, Ragesh Puthenkovilakam, Kapu Sirish Reddy, Chin-Jui Hsu
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Publication number: 20230360922Abstract: Provided herein are methods and related apparatuses for forming an ashable hard mask (AHM). In particular instances, use of a halogen-containing precursor can provide an AHM having improved etch resistance.Type: ApplicationFiled: September 23, 2021Publication date: November 9, 2023Inventors: Matthew Scott WEIMER, Ragesh PUTHENKOVILAKAM, Kapu Sirish REDDY
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Publication number: 20230268192Abstract: A method for selectively etching at least one feature in a first region with respect to a second region of a stack is provided. The first region is selectively etched with respect to the second region to form at least one partial feature in the first region, the at least one partial feature having a depth with respect to a surface of the second region. An in-situ a fluorine-free, non-conformal, carbon-containing mask is deposited over the first region and the second region, wherein the carbon-containing mask is selectively deposited on the second region at a second thickness with respect to the first region at a first thickness, the second thickness being greater than the first thickness. The first region is further etched in-situ to etch the at least one partial feature and wherein the carbon-containing mask acts as an etch mask for the second region.Type: ApplicationFiled: June 13, 2022Publication date: August 24, 2023Inventors: Eric HUDSON, Kapu Sirish REDDY, Ragesh PUTHENKOVILAKAM, Shashank DESHMUKH, Prabhat KUMAR, Prabhakara GOPALADASU, Seokmin YUN, Xin ZHANG
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Publication number: 20230167545Abstract: The present disclosure relates to compositions including a mixture or solution of acetylene and a stabilizer. In particular embodiments, the composition is a stabilized composition including pressurized acetylene.Type: ApplicationFiled: March 12, 2021Publication date: June 1, 2023Inventors: Kapu Sirish Reddy, Adrien LaVoie
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Publication number: 20230112746Abstract: Various embodiments herein relate to methods, apparatus, and systems for depositing a boron-based ceramic film on a substrate. Advantageously, the boron-based ceramic films described herein can be formed at relatively low temperatures (e.g., about 600C or less), while still achieving very high quality materials that exhibit good mechanical strength (e.g., high hardness and Young's modulus), good etch selectivity, amorphous morphology, etc. The films herein also have low hydrogen content, low oxygen content, and low halide content. In many cases, the films may be formed through a reaction between a boron halide and a saturated or unsaturated hydrocarbon, in the presence of plasma.Type: ApplicationFiled: February 23, 2021Publication date: April 13, 2023Inventors: Ananda K. BANERJI, Jon HENRI, Kapu Sirish REDDY, Christopher Nicholas IADANZA
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Publication number: 20220406610Abstract: A tool and method for processing substrates by encapsulating a mask to protect from degradation during an etch-back to prevent a feature liner material from pinching off an opening during deposition-etch cycles used to fabricate high aspect ratio features with very tight critical dimension control.Type: ApplicationFiled: September 23, 2020Publication date: December 22, 2022Inventors: Kapu Sirish REDDY, Jon HENRI, Francis Sloan ROBERTS
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Publication number: 20220199417Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.Type: ApplicationFiled: March 16, 2020Publication date: June 23, 2022Inventors: Jon HENRI, Karthik S. COLINJIVADI, Francis Sloan ROBERTS, Kapu Sirish REDDY, Samantha SiamHwa TAN, Shih-Ked LEE, Eric HUDSON, Todd SHROEDER, Jialing YANG, Huifeng ZHENG
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Publication number: 20210358753Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap tilling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: ApplicationFiled: July 29, 2021Publication date: November 18, 2021Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 11094542Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: GrantFiled: January 15, 2020Date of Patent: August 17, 2021Assignee: Lam Research CorporationInventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 10998187Abstract: Methods are provided for conducting a deposition on a semiconductor substrate by selectively depositing a material on the substrate. The substrate has a plurality of substrate materials, each with a different nucleation delay corresponding to the material deposited thereon. Specifically, the nucleation delay associated with a first substrate material on which deposition is intended is less than the nucleation delay associated with a second substrate material on which deposition is not intended according to a nucleation delay differential, which degrades as deposition proceeds. A portion of the deposited material is etched to reestablish the nucleation delay differential between the first and the second substrate materials. The material is further selectively deposited on the substrate.Type: GrantFiled: December 13, 2019Date of Patent: May 4, 2021Assignee: LAM RESEARCH CORPORATIONInventors: Kapu Sirish Reddy, Meliha Gozde Rainville, Nagraj Shankar, Dennis M. Hausmann, David Charles Smith, Karthik Sivaramakrishnan, David W. Porter
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Patent number: 10804144Abstract: Aluminum oxide films with a thickness of between about 10-50 ?, characterized by a dielectric constant (k) of less than about 7 (such as about 4-6) and having a density of at least about 2.5 g/cm3 (such as about 3.0-3.2 g/cm3) are deposited on partially fabricated semiconductor devices over a metal (e.g., cobalt or copper) such that the metal does not show signs of oxidation. In some embodiments, the films are etch stop films.Type: GrantFiled: April 17, 2020Date of Patent: October 13, 2020Assignee: Lam Research CorporationInventors: Meliha Gozde Rainville, Nagraj Shankar, Kapu Sirish Reddy, Dennis M. Hausmann
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Patent number: 10745806Abstract: Showerheads for independently delivering different, mutually-reactive process gases to a wafer processing space are provided. The showerheads include a first gas distributor that has multiple plenum structures that are separated from one another by a gap, as well as a second gas distributor positioned above the first gas distributor. Isolation gas from the second gas distributor may be flowed down onto the first gas distributor and through the gaps in between the plenum structures of the first gas distributor, thereby establishing an isolation gas curtain that prevents the process gases released from each plenum structure from parasitically depositing on the plenum structures that provide other gases.Type: GrantFiled: November 1, 2019Date of Patent: August 18, 2020Assignee: Lam Research CorporationInventors: Nagraj Shankar, Jeffrey D. Womack, Meliha Gozde Rainville, Emile C. Draper, Pankaj G. Ramnani, Feng Bi, Pengyi Zhang, Elham Mohimi, Kapu Sirish Reddy
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Publication number: 20200251384Abstract: Aluminum oxide films with a thickness of between about 10-50 ?, characterized by a dielectric constant (k) of less than about 7 (such as about 4-6) and having a density of at least about 2.5 g/cm3 (such as about 3.0-3.2 g/cm3) are deposited on partially fabricated semiconductor devices over a metal (e.g., cobalt or copper) such that the metal does not show signs of oxidation. In some embodiments, the films are etch stop films.Type: ApplicationFiled: April 17, 2020Publication date: August 6, 2020Inventors: Meliha Gozde Rainville, Nagraj Shankar, Kapu Sirish Reddy, Dennis M. Hausmann
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Publication number: 20200168466Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.Type: ApplicationFiled: January 15, 2020Publication date: May 28, 2020Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
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Patent number: 10665501Abstract: Aluminum oxide films characterized by a dielectric constant (k) of less than about 7 (such as between about 4-6) and having a density of at least about 2.5 g/cm3 (such as about 3.0-3.2 g/cm3) are deposited on partially fabricated semiconductor devices over both metal and dielectric to serve as etch stop layers. The films are deposited using a deposition method that does not lead to oxidative damage of the metal. The deposition involves reacting an aluminum-containing precursor (e.g., a trialkylaluminum) with an alcohol and/or aluminum alkoxide. In one implementation the method involves flowing trimethylaluminum to the process chamber housing a substrate having an exposed metal and dielectric layers; purging and/or evacuating the process chamber; flowing t-butanol to the process chamber and allowing it to react with trimethylaluminum to form an aluminum oxide film and repeating the process steps until the film of desired thickness is formed.Type: GrantFiled: November 22, 2017Date of Patent: May 26, 2020Assignee: Lam Research CorporationInventors: Meliha Gozde Rainville, Nagraj Shankar, Kapu Sirish Reddy, Dennis M. Hausmann
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Patent number: 10651080Abstract: Thin AlN films are oxidatively treated in a plasma to form AlO and AlON films without causing damage to underlying layers of a partially fabricated semiconductor device (e.g., to underlying metal and/or dielectric layers). The resulting AlO and AlON films are characterized by improved leakage current compared to the AlN film and are suitable for use as etch stop layers. The oxidative treatment involves contacting the substrate having an exposed AlN layer with a plasma formed in a process gas comprising an oxygen-containing gas and a hydrogen-containing gas. In some implementations oxidative treatment is performed with a plasma formed in a process gas including CO2 as an oxygen-containing gas, H2 as a hydrogen-containing gas, and further including a diluent gas. The use of a hydrogen-containing gas in the plasma eliminates the oxidative damage to the underlying layers.Type: GrantFiled: June 28, 2016Date of Patent: May 12, 2020Assignee: Lam Research CorporationInventors: Meliha Gozde Rainville, Nagraj Shankar, Daniel Damjanovic, Kapu Sirish Reddy
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Patent number: 10643889Abstract: A method of improving selectivity of a metal in a selective deposition process. A pre-treatment process for the metal modifies the metal surface, and includes first reducing the metal to remove organic contamination from the metal followed by oxidation of the metal to allow a monolayer of a metal oxide to grow on the surface. This modification of the metal allows inhibitor molecules to adsorb on the metal oxide monolayer to improve selectivity.Type: GrantFiled: August 6, 2018Date of Patent: May 5, 2020Assignee: Lam Rasearch CorporationInventors: Dennis Hausmann, Elham Mohimi, Pengyi Zhang, Paul C. Lemaire, Kashish Sharma, Alexander R. Fox, Nagraj Shankar, Kapu Sirish Reddy, David Charles Smith
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Publication number: 20200118809Abstract: Methods are provided for conducting a deposition on a semiconductor substrate by selectively depositing a material on the substrate. The substrate has a plurality of substrate materials, each with a different nucleation delay corresponding to the material deposited thereon. Specifically, the nucleation delay associated with a first substrate material on which deposition is intended is less than the nucleation delay associated with a second substrate material on which deposition is not intended according to a nucleation delay differential, which degrades as deposition proceeds. A portion of the deposited material is etched to reestablish the nucleation delay differential between the first and the second substrate materials. The material is further selectively deposited on the substrate.Type: ApplicationFiled: December 13, 2019Publication date: April 16, 2020Inventors: Kapu Sirish Reddy, Meliha Gozde Rainville, Nagraj Shankar, Dennis M. Hausmann, David Charles Smith, Karthik Sivaramakrishnan, David W. Porter