Abstract: System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of (1) decoding a destination address from a first memory transfer instruction, (2) storing the destination address in a register in the bus interface unit, (3) decoding a source address from a second memory transfer instruction, and (4) copying the contents of a memory location specified by the source memory address to a memory location specified by the contents of the register. Other methods and a microprocessor system are also presented.

Abstract: System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of (1) decoding a destination address from a first memory transfer instruction, (2) storing the destination address in a register in the bus interface unit, (3) decoding a source address from a second memory transfer instruction, and (4) copying the contents of a memory location specified by the source memory address to a memory location specified by the contents of the register. Other methods and a microprocessor system are also presented.

Abstract: System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of (1) decoding a destination address from a first memory transfer instruction, (2) storing the destination address in a register in the bus interface unit, (3) decoding a source address from a second memory transfer instruction, and (4) copying the contents of a memory location specified by the source memory address to a memory location specified by the contents of the register. Other methods and a microprocessor system are also presented.

Abstract: An Input/Output (IO) Virtualization (IOV) system provides a mechanism for sharing computer peripheral devices or resources between multiple host computers by presenting a single resource multiple times to numerous host systems. The IOV system provides IO virtualization and host-to-host communication services to the host computers. The system comprises device interfaces coupled to the IO devices. Each IO device comprises at least one endpoint function (EPF). Host interfaces are each coupled to one of a number of host computers. Each host interface includes a proxy, and each proxy comprises configuration data.

Abstract: An Input/Output (IO) Virtualization (IOV) system provides for sharing of computer peripheral devices between multiple host computers by presenting a single device multiple times to numerous host systems. The IOV system, in coupling or connecting multiple host computers and multiple IO devices, provides IO virtualization and host-to-host communication services to the host computers. The system comprises device interfaces coupled to IO devices, and host interfaces coupled to each of a number of host computers. The IO devices are initialized in a first domain. Each host interface exposes functions of the independent IO devices to the host computer to which it is coupled. Each host computer accesses functions from a host domain that is an independent domain specific to the host computer performing the access. The first domain is different from the host domain.

Abstract: An Input/Output (IO) Virtualization (IOV) system couples or connects multiple host computers and IO devices to a managed transport fabric to provide IO virtualization. The host computers may run any operating system to provide a virtualized environment for guest operating systems. The host interface to the IOV system is PCI-Express (PCIe). The IO devices are PCIe based to provide maximum compatibility with industry standard devices, but are not so limited. The IOV system comprises a management central processor unit (MCPU) coupled to transport fabric. The IOV system comprises device interfaces coupled to the transport fabric and to independent input/output (IO) devices. Each device interface couples to the IO device of the independent IO devices. The IOV system comprises host interfaces coupled to the transport fabric. Each host interface couples to a host computer of the independent host computers and exposes functions of the independent IO devices to the host computer.

Abstract: An Input/Output (IO) Virtualization (IOV) system provides a mechanism for sharing computer peripheral devices or resources between multiple host computers by presenting a single resource multiple times to numerous host systems. The IOV system provides IO virtualization and host-to-host communication services to the host computers. The system comprises device interfaces coupled to the IO devices. Each IO device comprises at least one endpoint function (EPF). Host interfaces are each coupled to one of a number of host computers. Each host interface includes a proxy, and each proxy comprises configuration data.

Abstract: An Input/Output (IO) Virtualization (IOV) system provides for sharing of computer peripheral devices between multiple host computers by presenting a single device multiple times to numerous host systems. The IOV system, in coupling or connecting multiple host computers and multiple IO devices, provides IO virtualization and host-to-host communication services to the host computers. The system comprises device interfaces coupled to IO devices, and host interfaces coupled to each of a number of host computers. The IO devices are initialized in a first domain. Each host interface exposes functions of the independent IO devices to the host computer to which it is coupled. Each host computer accesses functions from a host domain that is an independent domain specific to the host computer performing the access. The first domain is different from the host domain.

Abstract: An Input/Output (IO) Virtualization (IOV) system couples or connects multiple host computers and IO devices to a managed transport fabric to provide IO virtualization. The host computers may run any operating system to provide a virtualized environment for guest operating systems. The host interface to the IOV system is PCI-Express (PCIe). The IO devices are PCIe based to provide maximum compatibility with industry standard devices, but are not so limited. The IOV system comprises a management central processor unit (MCPU) coupled to transport fabric. The IOV system comprises device interfaces coupled to the transport fabric and to independent input/output (IO) devices. Each device interface couples to the IO device of the independent IO devices. The IOV system comprises host interfaces coupled to the transport fabric. Each host interface couples to a host computer of the independent host computers and exposes functions of the independent IO devices to the host computer.

Abstract: System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of (1) decoding a destination address from a first memory transfer instruction, (2) storing the destination address in a register in the bus interface unit, (3) decoding a source address from a second memory transfer instruction, and (4) copying the contents of a memory location specified by the source memory address to a memory location specified by the contents of the register. Other methods and a microprocessor system are also presented.