Patents by Inventor Karen A. Szypulski
Karen A. Szypulski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9531647Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from multiple hosts, manages traffic among the hosts, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found. The lookup front-end further processes the response message and provides a corresponding response to the host.Type: GrantFiled: March 15, 2013Date of Patent: December 27, 2016Assignee: Cavium, Inc.Inventors: Rajan Goyal, Gregg A. Bouchard, Troy S. Dahlmann, Jeffrey Richard Hardesty, Karen A. Szypulski
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Patent number: 9497117Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found. The lookup front-end further processes the response message and provides a corresponding response to the host.Type: GrantFiled: November 18, 2013Date of Patent: November 15, 2016Assignee: Cavium, Inc.Inventors: Rajan Goyal, Gregg A. Bouchard, Jeffrey R. Hardesty, Troy S. Dahlmann, Karen A. Szypulski
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Patent number: 9276846Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. Based on information in the packet, the lookup front-end can optimize start times for sending key requests as a continuous stream with minimal delay. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found.Type: GrantFiled: March 15, 2013Date of Patent: March 1, 2016Assignee: Cavium, Inc.Inventors: Rajan Goyal, Gregg A. Bouchard, Karen A. Szypulski, Charles D. Spackman
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Patent number: 9152494Abstract: In an embodiment, a method of handling data packets within a processor includes intercepting, by a hardware packet integrity checking module, one or more data fields associated with a current segment of a data packet being forwarded from a first hardware entity operating in a cut-through mode to one or more processing clusters, where at least one data field of the one or more data fields is indicative of an operation associated with the data packet. At the hardware error detection module, integrity of the current segment of the data packet is checked based on the one or more data fields and parameters corresponding to the operation associated with the data packet. At least one data field of the one or more data fields is modified upon detecting an integrity error. The data fields are forwarded to the one or more processing clusters.Type: GrantFiled: March 15, 2013Date of Patent: October 6, 2015Assignee: Cavium, Inc.Inventors: Jeffrey R. Hardesty, Troy S. Dahlmann, Karen A. Szypulski, Jeffrey A. Pangborn, Najeeb I. Ansari, Theodore H. Holler
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Publication number: 20140269718Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. Based on information in the packet, the lookup front-end can optimize start times for sending key requests as a continuous stream with minimal delay. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Inventors: Rajan Goyal, Gregg A. Bouchard, Karen A. Szypulski, Charles D. Spackman
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Publication number: 20140281834Abstract: In an embodiment, a method of handling data packets within a processor includes intercepting, by a hardware packet integrity checking module, one or more data fields associated with a current segment of a data packet being forwarded from a first hardware entity operating in a cut-through mode to one or more processing clusters, where at least one data field of the one or more data fields is indicative of an operation associated with the data packet. At the hardware error detection module, integrity of the current segment of the data packet is checked based on the one or more data fields and parameters corresponding to the operation associated with the data packet. At least one data field of the one or more data fields is modified upon detecting an integrity error. The data fields are forwarded to the one or more processing clusters.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: Cavium, Inc.Inventors: Jeffrey R. Hardesty, Troy S. Dahlmann, Karen A. Szypulski, Jeffrey A. Pangborn, Najeeb I. Ansari, Theodore H. Holler
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Publication number: 20140188973Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found. The lookup front-end further processes the response message and provides a corresponding response to the host.Type: ApplicationFiled: November 18, 2013Publication date: July 3, 2014Applicant: Cavium, Inc.Inventors: Rajan Goyal, Gregg A. Bouchard, Jeffrey R. Hardesty, Troy S. Dahlmann, Karen A. Szypulski
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Patent number: 8606959Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found. The lookup front-end further processes the response message and provides a corresponding response to the host.Type: GrantFiled: August 2, 2012Date of Patent: December 10, 2013Assignee: Cavium, Inc.Inventors: Rajan Goyal, Gregg A. Bouchard, Jeffrey R. Hardesty, Troy S. Dahlmann, Karen A. Szypulski
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Publication number: 20130036152Abstract: A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found. The lookup front-end further processes the response message and provides a corresponding response to the host.Type: ApplicationFiled: August 2, 2012Publication date: February 7, 2013Applicant: Cavium, Inc.Inventors: Rajan Goyal, Gregg A. Bouchard, Jeffrey R. Hardesty, Troy S. Dahlmann, Karen A. Szypulski
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Patent number: 7889659Abstract: Controlling a transmission rate of packet traffic includes receiving packets from a network processor. The packets are stored in a buffer associated with a processor. If an occupancy level of the buffer is greater than a predetermined threshold, it is determined that the processor is congested. A message is transmitted to the network processor indicating the processor is congested.Type: GrantFiled: April 16, 2007Date of Patent: February 15, 2011Assignee: Cisco Technology, Inc.Inventors: Rafael Mantilla Montalvo, Jorge Manuel Gonzalez, Nathan Allen Mitchell, Timothy F. Masterson, Stephen Charles Hilla, Karen A. Szypulski
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Publication number: 20080253284Abstract: Controlling a transmission rate of packet traffic includes receiving packets from a network processor. The packets are stored in a buffer associated with a processor. If an occupancy level of the buffer is greater than a predetermined threshold, it is determined that the processor is congested. A message is transmitted to the network processor indicating the processor is congested.Type: ApplicationFiled: April 16, 2007Publication date: October 16, 2008Applicant: Cisco Technology, Inc.Inventors: Rafael Mantilla Montalvo, Jorge Manuel Gonzalez, Nathan Allen Mitchell, Timothy F. Masterson, Stephen Charles Hilla, Karen A. Szypulski