Patents by Inventor Karen Carpenter

Karen Carpenter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Coupling of conductive vias to complex power-signal substructures
    Patent number: 7500306
    Abstract: A method of forming an electrical structure that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the testes, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: Karen Carpenter, Voya R. Markovich, David L. Thomas
  • Coupling of conductive vias to complex power-signal substructures
    Publication number: 20050005439
    Abstract: An electrical structure, and associated method of formation, that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
    Type: Application
    Filed: August 5, 2004
    Publication date: January 13, 2005
    Inventors: Karen Carpenter, Voya Markovich, David Thomas
  • Coupling of conductive vias to complex power-signal substructures
    Patent number: 6810583
    Abstract: An electrical structure that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: November 2, 2004
    Assignee: International Business Machines Corporation
    Inventors: Karen Carpenter, Voya R. Markovich, David L. Thomas
  • Coupling of conductive vias to complex power-signal substructures
    Publication number: 20030029636
    Abstract: An electrical structure, and associated method of formation, that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.
    Type: Application
    Filed: August 7, 2001
    Publication date: February 13, 2003
    Applicant: International Business Machines Corporation
    Inventors: Karen Carpenter, Voya R. Markovich, David L. Thomas