Abstract: A method for removing photoresist bridging defects includes coating a photoresist layer over a dielectric layer formed over a substrate, applying a first developer that results in formation of one or more photoresist bridging defects, and applying a second developer to remove the one or more photoresist bridging defects. The first developer is an aqueous base developer and the second developer is a reverse tone weak developer (RTWD), the RTWD being a mixture of a first (good) solvent and a second (bad) solvent for the photoresist.

Abstract: A method for removing photoresist bridging defects includes coating a photoresist layer over a dielectric layer formed over a substrate, applying a first developer that results in formation of one or more photoresist bridging defects, and applying a second developer to remove the one or more photoresist bridging defects. The first developer is an aqueous base developer and the second developer is a reverse tone weak developer (RTWD), the RTWD being a mixture of a first (good) solvent and a second (bad) solvent for the photoresist.

Abstract: A photoresist is developed on a semiconductor wafer. The wafer is introduced into a controlled cold temperature environment and is maintained there until inelastic thermal contraction of the developed photoresist material results in reducing the critical dimension (CD) of the photoresist by not less than 10% from its value before exposure to the controlled cold temperature environment. Then the semiconductor wafer is removed from the controlled cold temperature environment.

Abstract: The present invention provides a resist multilayer film-attached substrate, including a substrate and a resist multilayer film formed on the substrate, in which the resist multilayer film has an organic resist underlayer film difficultly soluble in ammonia hydrogen peroxide water, an organic film soluble in ammonia hydrogen peroxide water, a silicon-containing resist middle layer film, and a resist upper layer film laminated on the substrate in the stated order. There can be provided a resist multilayer film-attached substrate that enables a silicon residue modified by dry etching to be easily removed in a wet manner with a removing liquid harmless to a semiconductor apparatus substrate and an organic resist underlayer film required in the patterning process, for example, an ammonia aqueous solution containing hydrogen peroxide called SC1, which is commonly used in the semiconductor manufacturing process.

Abstract: An extreme ultraviolet lithography pattern stack, including, an inorganic hardmask layer, an under layer on the inorganic hardmask layer, and a resist layer on the under layer, where the inorganic hardmask layer, under layer, and resist layer have a combined thickness in the range of about 8.5 nm to about 70 nm.

Abstract: The present invention provides a resist multilayer film-attached substrate, including a substrate and a resist multilayer film formed on the substrate, in which the resist multilayer film has an organic resist underlayer film difficultly soluble in ammonia hydrogen peroxide water, an organic film soluble in ammonia hydrogen peroxide water, a silicon-containing resist middle layer film, and a resist upper layer film laminated on the substrate in the stated order. There can be provided a resist multilayer film-attached substrate that enables a silicon residue modified by dry etching to be easily removed in a wet manner with a removing liquid harmless to a semiconductor apparatus substrate and an organic resist underlayer film required in the patterning process, for example, an ammonia aqueous solution containing hydrogen peroxide called SC1, which is commonly used in the semiconductor manufacturing process.

Abstract: An extreme ultraviolet lithography pattern stack, including, an inorganic hardmask layer, an under layer on the inorganic hardmask layer, and a resist layer on the under layer, where the inorganic hardmask layer, under layer, and resist layer have a combined thickness in the range of about 8.5 nm to about 70 nm.

Abstract: An extreme ultraviolet lithography pattern stack, including, an inorganic hardmask layer, an under layer on the inorganic hardmask layer, and a resist layer on the under layer, where the inorganic hardmask layer, under layer, and resist layer have a combined thickness in the range of about 8.5 nm to about 70 nm.

Abstract: A method for removing photoresist bridging defects includes coating a photoresist layer over a dielectric layer formed over a substrate, applying a first developer that results in formation of one or more photoresist bridging defects, and applying a second developer to remove the one or more photoresist bridging defects. The first developer is an aqueous base developer and the second developer is a reverse tone weak developer (RTWD), the RTWD being a mixture of a first (good) solvent and a second (bad) solvent for the photoresist.

Abstract: A method for removing photoresist bridging defects includes coating a photoresist layer over a dielectric layer formed over a substrate, applying a first developer that results in formation of one or more photoresist bridging defects, and applying a second developer to remove the one or more photoresist bridging defects. The first developer is an aqueous base developer and the second developer is a reverse tone weak developer (RTWD), the RTWD being a mixture of a first (good) solvent and a second (bad) solvent for the photoresist.

Abstract: An extreme ultraviolet lithography pattern stack, including, an inorganic hardmask layer, an under layer on the inorganic hardmask layer, and a resist layer on the under layer, where the inorganic hardmask layer, under layer, and resist layer have a combined thickness in the range of about 8.5 nm to about 70 nm.

Abstract: An article including a microelectronic substrate is provided as an article usable during the processing of the microelectronic substrate. Such article includes a microelectronic substrate having a front surface, a rear surface opposite the front surface and a peripheral edge at boundaries of the front and rear surfaces. The front surface is a major surface of the article. A removable annular edge extension element having a front surface, a rear surface and an inner edge extending between the front and rear surfaces has the inner edge joined to the peripheral edge of the microelectronic substrate. In such way, a continuous surface is formed which includes the front surface of the edge extension element extending laterally from the peripheral edge of the microelectronic substrate and the front surface of the microelectronic substrate, the continuous surface being substantially co-planar and flat where the peripheral edge is joined to the inner edge.

Abstract: An article including a microelectronic substrate is provided as an article usable during the processing of the microelectronic substrate. Such article includes a microelectronic substrate having a front surface, a rear surface opposite the front surface and a peripheral edge at boundaries of the front and rear surfaces. The front surface is a major surface of the article. A removable annular edge extension element having a front surface, a rear surface and an inner edge extending between the front and rear surfaces has the inner edge joined to the peripheral edge of the microelectronic substrate. In such way, a continuous surface is formed which includes the front surface of the edge extension element extending laterally from the peripheral edge of the microelectronic substrate and the front surface of the microelectronic substrate, the continuous surface being substantially co-planar and flat where the peripheral edge is joined to the inner edge.

Abstract: An article including a microelectronic substrate is provided as an article usable during the processing of the microelectronic substrate. Such article includes a microelectronic substrate having a front surface, a rear surface opposite the front surface and a peripheral edge at boundaries of the front and rear surfaces. The front surface is a major surface of the article. A removable annular edge extension element having a front surface, a rear surface and an inner edge extending between the front and rear surfaces has the inner edge joined to the peripheral edge of the microelectronic substrate. In such way, a continuous surface is formed which includes the front surface of the edge extension element and the front surface of the microelectronic substrate, the continuous surface being substantially co-planar and flat where the peripheral edge is joined to the inner edge.

Abstract: Resist compositions having good footing properties even on difficult substrates are obtained by using a combination of base additives including a room temperature solid base, and a liquid low vapor pressure base. The compositions are especially useful on metal substrates such as chromium-containing layers commonly used in mask-making.

Abstract: Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.

Abstract: Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.

Abstract: Resist compositions having good footing properties even on difficult substrates are obtained by using a combination of base additives including a room temperature solid base, and a liquid low vapor pressure base. The compositions are especially useful on metal substrates such as chromium-containing layers commonly used in mask-making.

Abstract: Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.

Abstract: Multilayered resist structures including bilayer and top surface imaging which utilize tuned underlayers functioning as ARCs, planarizing layers, and etch resistant hard masks whose properties such as optical, chemical and physical properties are tailored to give a multilayer resist structure exhibiting high resolution, residue free lithography and methods of preparing these materials.