Patents by Inventor Karen E. Yokoyama

Karen E. Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6216941
    Abstract: A method for forming high frequency connections between a fragile chip and a substrate is described, wherein metal is selectively deposited on a surface of a chip and a surface of a substrate, and corresponding patterns of electrically conductive bumps are selectively evaporated on the surface of the chip and the surface of the substrate over the metal layers, to form a pattern of electrically conductive bumps having spongy and dendritic properties, placing the chip in aligned contact with the substrate where each electrically conductive chip bump mates with each corresponding electrically conductive substrate bump, and selectively applying heat and pressure to the chip and substrate causing each chip bump to fuse together with each corresponding substrate bump to form an electromechanical bond.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: April 17, 2001
    Assignee: TRW Inc.
    Inventors: Karen E. Yokoyama, Gershon Akerling, Moshe Sergant
  • Patent number: 6050476
    Abstract: A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.
    Type: Grant
    Filed: September 19, 1998
    Date of Patent: April 18, 2000
    Assignee: TRW Inc.
    Inventors: Karen E. Yokoyama, Gershon Akerling
  • Patent number: 6032852
    Abstract: A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.
    Type: Grant
    Filed: September 19, 1998
    Date of Patent: March 7, 2000
    Assignee: TRW Inc.
    Inventors: Karen E. Yokoyama, Gershon Akerling
  • Patent number: 5920464
    Abstract: A reworkable cold welded microelectronic multi-chip module contains cold welded microelectronic chips in which the chip's cold weld metal bonding pads (3) are constructed of a metal having one hardness and the corresponding cold weld metal bonding pads of the multi-chip module's substrate (5) are of a different greater hardness, which, despite the difference in hardness, cold weld to one another. Two forms of Indium preferably serve as the metals. If for any reason the chip must be removed from the module, it is found that the cold weld breaks at a predictable location. A new microelectronic chip may thereby be cold welded to the module substrate as a replacement. New rework and testing procedures are thereby made possible.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: July 6, 1999
    Assignee: TRW Inc.
    Inventors: Karen E. Yokoyama, Gershon Akerling
  • Patent number: 5789622
    Abstract: A method of calibrating gains and offsets for a two-dimensional detector array 10 comprising individual detector elements 14, including: (a) focusing a first incoming image signal at a first power level onto the detector array 10; (b) reading the corresponding electrical signals from the detector elements 14 as a first image frame at the first power level; (c) for each detector element 14, translating the first incoming image signal by a detector element distance onto an adjacent detector element; (d) reading the corresponding electrical signal from the detector elements 14 as a second image frame at the first power level; (e) focusing a second incoming image signal at a second power level onto the detector array 10; (f) reading the corresponding electrical signals from the detector elements 14 as a first image frame at the second power level; (g) for each detector element 14, translating the second incoming image signal by a detector element distance onto an adjacent detector element; (h) reading the corresp
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: August 4, 1998
    Assignee: TRW Inc.
    Inventors: Bill H. Quon, Paul S. Lee, Steven W. Fornaca, Karen E. Yokoyama