Patents by Inventor Karen Elizabeth Moore

Karen Elizabeth Moore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784236
    Abstract: Methods of fabricating a semiconductor device include providing a semiconductor substrate that includes a plurality of epitaxial layers, including a channel layer and a permanent cap over the channel layer, where the permanent cap defines an upper surface of the semiconductor substrate, and forming a sacrificial cap over the permanent cap in an active region of the device, where the sacrificial cap comprises a semiconductor material that includes aluminum. The method also includes forming one or more current carrying regions (e.g., source and drain regions) in the semiconductor substrate in the active region of the device by performing an ion implantation process to implant ions through the sacrificial cap, and into the semiconductor substrate, completely removing the sacrificial cap in the active region of the device, while refraining from removing the permanent cap, and forming one or more current carrying contacts over the one or more current carrying regions.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: October 10, 2023
    Assignee: NXP USA, Inc.
    Inventors: Jenn Hwa Huang, Yuanzheng Yue, Bruce Mcrae Green, Karen Elizabeth Moore, James Allen Teplik
  • Publication number: 20220102529
    Abstract: Methods of fabricating a semiconductor device include providing a semiconductor substrate that includes a plurality of epitaxial layers, including a channel layer and a permanent cap over the channel layer, where the permanent cap defines an upper surface of the semiconductor substrate, and forming a sacrificial cap over the permanent cap in an active region of the device, where the sacrificial cap comprises a semiconductor material that includes aluminum. The method also includes forming one or more current carrying regions (e.g., source and drain regions) in the semiconductor substrate in the active region of the device by performing an ion implantation process to implant ions through the sacrificial cap, and into the semiconductor substrate, completely removing the sacrificial cap in the active region of the device, while refraining from removing the permanent cap, and forming one or more current carrying contacts over the one or more current carrying regions.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 31, 2022
    Inventors: Jenn Hwa Huang, Yuanzheng Yue, Bruce McRae Green, Karen Elizabeth Moore, James Allen Teplik
  • Patent number: 10957790
    Abstract: A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor substrate, in ohmic contact with a contact region formed within the semiconductor substrate, and spaced from one another for current flow between the first and second ohmic contacts through the channel, and first and second dielectric layers supported by the semiconductor substrate. At least one of the first and second ohmic contacts extends through respective openings in the first and second dielectric layers. The second dielectric layer is disposed between the first dielectric layer and a surface of the semiconductor substrate, and the second dielectric layer includes a wet etchable material having an etch selectivity to a dry etchant of the first dielectric layer.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: March 23, 2021
    Assignee: NXP USA, Inc.
    Inventors: Bruce McRae Green, Darrell Glenn Hill, Karen Elizabeth Moore, Jenn-Hwa Huang, Yuanzheng Yue, James Allen Teplik, Lawrence Scott Klingbeil
  • Publication number: 20190157440
    Abstract: A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor substrate, in ohmic contact with a contact region formed within the semiconductor substrate, and spaced from one another for current flow between the first and second ohmic contacts through the channel, and first and second dielectric layers supported by the semiconductor substrate. At least one of the first and second ohmic contacts extends through respective openings in the first and second dielectric layers. The second dielectric layer is disposed between the first dielectric layer and a surface of the semiconductor substrate, and the second dielectric layer includes a wet etchable material having an etch selectivity to a dry etchant of the first dielectric layer.
    Type: Application
    Filed: December 31, 2018
    Publication date: May 23, 2019
    Inventors: Bruce McRae Green, Darrell Glenn Hill, Karen Elizabeth Moore, Jenn-Hwa Huang, Yuanzheng Yue, James Allen Teplik, Lawrence Scott Klingbeil
  • Publication number: 20140242594
    Abstract: A method for isolating genomic DNA (gDNA) from a biological material. In some embodiments, the method includes (a) contacting a sample that contains gDNA with a solution of hydroxide and a detergent under conditions and for a time sufficient to degrade a cell wall, a cell membrane, a nuclear membrane, a nucleoprotein, or combinations thereof and/or to denature the gDNA; (b) mixing into the solution resulting from step (a) a solution characterized by high salt and sufficient buffering capacity to reduce the pH of the solution to less than 10, thereby producing a neutralized solution; (c) centrifuging the sample at a speed and length of time sufficient to clarify the preparation; and (d) removing insoluble material from the neutralized and clarified preparation, whereby a solution of gDNA is produced.
    Type: Application
    Filed: February 4, 2014
    Publication date: August 28, 2014
    Applicant: SYNGENTA PARTICIPATIONS AG
    Inventors: Yanshan Ji, Wenling Wang, Er-Te Jamie Huang, Karen Elizabeth Moore, Kimberly Ann White