Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

Abstract: A mechanism is included for jointly determining filter coefficients for Finite Impulse Response (FIR) filters in a Linear, Memory-less Non-linear (LNL), Linear compensator. Calibration signals are applied to a signal converter input in a test and measurement system. Non-linear signal components are determined in signal output from the signal converter. Non-linear filter components are determined at the LNL compensator based on the calibration signals. The non-linear signal components are then compared to the non-linear filter components. The comparison is then resolved to determine filter coefficients for first stage Finite Impulse Response (FIR) filters and second stage FIR filters in the LNL.

Abstract: A test and measurement device having a signal source, including an impairment generator configured to output an impairment and a waveform synthesizer. The waveform synthesizer receives an input digital signal to be synthesized, receives the impairment, and synthesizes a synthesized digital signal based on the input digital signal and the impairment. The test and measurement instrument also includes a fixed sample rate digital-to-analog converter configured to receive a clock signal and the synthesized digital signal and output an analog signal.

Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

Abstract: A time-interleaved digital-to-analog converter system, comprising a digital pre-distorter configured to receive an input digital signal and an error signal and output a distorted digital signal based on the input digital signal and the error signal; a time-interleaved digital-to-analog converter having a first sample rate, the time-interleaved digital-to-analog converter configured to convert the distorted digital signal to an analog signal; and a calibration system. The calibration system includes an analog-to-digital converter having a second sample rate equal to or lower than the first sample rate, the analog-to-digital converter configured to receive the analog signal and covert the analog signal to a down-sampled digital signal, a discrete-time linear model configured to receive the input digital signal and the error signal and output a model signal, and a combiner to subtract the down-sampled digital signal from the model signal to generate the error signal.

Abstract: A time-interleaved digital-to-analog converter system, comprising a digital pre-distorter configured to receive an input digital signal and an error signal and output a distorted digital signal based on the input digital signal and the error signal; a time-interleaved digital-to-analog converter having a first sample rate, the time-interleaved digital-to-analog converter configured to convert the distorted digital signal to an analog signal; and a calibration system. The calibration system includes an analog-to-digital converter having a second sample rate equal to or lower than the first sample rate, the analog-to-digital converter configured to receive the analog signal and covert the analog signal to a down-sampled digital signal, a discrete-time linear model configured to receive the input digital signal and the error signal and output a model signal, and a combiner to subtract the down-sampled digital signal from the model signal to generate the error signal.

Abstract: A test and measurement device having a signal source, including an impairment generator configured to output an impairment and a waveform synthesizer. The waveform synthesizer receives an input digital signal to be synthesized, receives the impairment, and synthesizes a synthesized digital signal based on the input digital signal and the impairment. The test and measurement instrument also includes a fixed sample rate digital-to-analog converter configured to receive a clock signal and the synthesized digital signal and output an analog signal.

Abstract: A test and measurement device includes an input configured to receive an analog signal from a Device Under Test (DUT), an Analog to Digital Converter (ADC) coupled to the input and structured to convert the analog signal to a digital signal, a receiver implemented in a first Field Programmable Gate Array (FPGA) and structured to accept the digital signal and perform signal analysis on the digital signal, a transmitter implemented in a second FPGA and structured to generate a digital output signal, and a Digital to Analog Converter (DAC) coupled to the transmitter and structured to convert the digital output signal from the transmitter to an analog signal, and structured to send the analog signal to the DUT. The receiver and the transmitter are coupled together by a high speed data link over which data about the current testing environment may be shared.

Abstract: A mechanism is included for jointly determining filter coefficients for Finite Impulse Response (FIR) filters in a Linear, Memory-less Non-linear (LNL), Linear compensator. Calibration signals are applied to a signal converter input in a test and measurement system. Non-linear signal components are determined in signal output from the signal converter. Non-linear filter components are determined at the LNL compensator based on the calibration signals. The non-linear signal components are then compared to the non-linear filter components. The comparison is then resolved to determine filter coefficients for first stage Finite Impulse Response (FIR) filters and second stage FIR filters in the LNL.

Abstract: A time interleaved digital to analog converters (TIDACs) system having a pre-processing filter to filter a digital signal prior to being converted by a respective digital-to-analog converter (DAC) of the TIDACs system to correct for mismatches between the DACs of the TIDACs system. Calibrating the pre-processing includes converting a discrete waveform at a first DAC to a first analog signals and at a second DAC to a second analog signal and combining the first and second analog signals into a combined signal. An analog-to-digital converter (ADC) converts the combined signal to a digital signal to determine an actual frequency response of the TIDACs system. A desired frequency response of the TIDACs system is received and a pre-processing filter is generated for the first DAC and the second DAC based on the actual frequency response of the TIDACs system and the desired frequency response of the TIDACs system.

Abstract: A machine-implemented method can include receiving a common input signal over M parallel time-interleaved (TI) analog to digital converter (ADC) channels, determining a multiple-input, multiple-output finite impulse response (FIR) filter structure for correcting bandwidth mismatches between the M parallel TIADC channels, and providing a common output signal comprising TI data corresponding to the M parallel TIADC corrected channels.

Abstract: A machine-implemented method can include receiving a common input signal over M parallel time-interleaved (TI) analog to digital converter (ADC) channels, determining a multiple-input, multiple-output finite impulse response (FIR) filter structure for correcting bandwidth mismatches between the M parallel TIADC channels, and providing a common output signal comprising TI data corresponding to the M parallel TIADC corrected channels.

Abstract: A method and system are described for canceling far end cross-talk in communication systems. A first transmitter transmits the first effective data source signals across the first channel. A second transmitter transmits the second effective data source signals across the second channel. In one embodiment, a receiver unit receives first and second effective data source signals across a first channel and a second channel, respectively, and also one or more cross-talk signals. A far end cross talk (FEXT) canceller located in the receiver unit receives second estimated effective data source signals based on the second effective data source signals. The receiver unit cancels the one or more cross-talk signals using the second estimated effective data source signals.

Abstract: An improved Tomlinson Harashima Precoding (THP) communication system through special configuration of its feedback coefficients is disclosed. Improvement, in terms of THP system robustness against analog-to-digital (ADC) sampling phase variation, is achieved either by deriving feedback coefficients of the Decision Feedback Equalizer at worst ADC sampling phase or by inserting a Zero Edge Filter (ZEF) at the receiver. The ZEF modifies the communication system such that the feedback filter coefficients derived in the Decision Feedback Equalizer (DFE) mode and later used in the THP mode is capable to compensate the zero at Nyquist Frequency due to a non-optimum sampling, phase of the ADC. The THP communication system, modified and improved with the insertion of ZEF, is operable to switch from an adaptive Decision Feedback Equalizer (DFE) mode to a THP mode having an adaptive Linear Equalizer (LE) at the receiver.

Abstract: The invention relates to a method and apparatus of an improved Tomlinson Harashima Precoding (THP) communication system through special configuration of its feedback coefficients. Improvement, in terms of THP system robustness against analog-to-digital (ADC) sampling phase variation, is achieved either by deriving feedback coefficients of the Decision Feedback Equalizer at worst ADC sampling phase or by inserting a Zero Edge Filter (ZEF) at the receiver. The ZEF modifies the communication system such that the feedback filter coefficients derived in the Decision Feedback Equalizer (DFE) mode and later used in the THP mode is capable to compensate the zero at Nyquist Frequency due to a non-optimum sampling phase of the ADC. The THP communication system, modified and improved with the insertion of ZEF, is operable to switch from an adaptive Decision Feedback Equalizer (DFE) mode to a THP mode having an adaptive Linear Equalizer (LE) at the receiver.

Abstract: An optical communication system includes a first optical device including a transmission optical switch and a controller coupled to the transmission optical switch, and a second optical device coupled to the first optical device via each of a first fiber and a second fiber. The transmission optical switch is configured to operate in one of a first mode associated with the first fiber and a second mode associated with the second fiber based on control signals generated by the controller. Moreover, the controller is configured to perform a non-revertive switching operation on the transmission optical switch based on the satisfaction or the non-satisfaction of a predetermined condition or a plurality of predetermined conditions.

Abstract: An optical communication system includes a first optical device including a transmission optical switch and a controller coupled to the transmission optical switch, and a second optical device coupled to the first optical device via each of a first fiber and a second fiber. The transmission optical switch is configured to operate in one of a first mode associated with the first fiber and a second mode associated with the second fiber based on control signals generated by the controller. Moreover, the controller is configured to perform a non-revertive switching operation on the transmission optical switch based on the satisfaction or the non-satisfaction of a predetermined condition or a plurality of predetermined conditions.

Abstract: An optical communication system includes a first optical device including a transmission optical switch and a controller coupled to the transmission optical switch, and a second optical device coupled to the first optical device via each of a first fiber and a second fiber. The transmission optical switch is configured to operate in one of a first mode associated with the first fiber and a second mode associated with the second fiber based on control signals generated by the controller. Moreover, the controller is configured to perform a non-revertive switching operation on the transmission optical switch based on the satisfaction or the non-satisfaction of a predetermined condition or a plurality of predetermined conditions.