Abstract: A semiconductor device having well-defined profiles is disclosed. A p-type pocket/halo region is preferably formed along a channel-side border of the heavily doped source/drain region to neutralize diffused n-type elements. A diffusion-retarding region is formed to retard diffusion for both p-type and n-type impurities by substantially overlapping or extending beyond the p-type pocket/halo region and the N+ S/D region at least on the channel side.

Abstract: A method for forming the N-MOS and P-MOS transistor regions of a CMOS device having reduced depletion of the N and P dopants in the polysilicon gate and reduced penetration of the N and P dopants through the oxide layer and into the channel regions of the N-MOS and the P-MOS transistor. The improvements are accomplished by a new implantation treatment of the polysilicon gate layer prior to implanting the polysilicon layer with the N-type dopant and the P-type dopant for purposes of forming the transistor gates. The implantation treatment prior to the N-type dopant and P-type dopant implantation, includes a first implantation of Ge and/or an inert gas and a second implantation of carbon or fluorine.

Abstract: A semiconductor device having well-defined profiles is disclosed. A p-type pocket/halo region is preferably formed along a channel-side border of the heavily doped source/drain region to neutralize diffused n-type elements. A diffusion-retarding region is formed to retard diffusion for both p-type and n-type impurities by substantially overlapping or extending beyond the p-type pocket/halo region and the N+ S/D region at least on the channel side.

Abstract: A semiconductor device and method for fabricating the same. The semiconductor device comprises a substrate with a gate stack thereon, wherein the gate stack comprises a high-k dielectric layer and a conductive layer sequentially overlying a portion of the substrate. An oxidation-proof layer overlies sidewalls of the gate stack. A pair of insulating spacers oppositely overlies sidewalls of the gate stack and the oxidation-proof layers thereon and a pair of source/drain regions is oppositely formed in the substrate adjacent to the gate stack, wherein the oxidation-proof layer suppresses oxidation encroachment between the gate stack and the substrate.

Abstract: Methods for rapid thermal processing of semiconductor substrates are provided. An exemplary method comprises directing radiant heat energy emitted from a heat source toward a backside surface of the semiconductor substrate. Systems for rapid thermal processing also are provided.

Abstract: A method for fabricating a portion of an integrated circuit on a semiconductor substrate. The method includes cleaning the surface of the substrate, and forming a thin insulate over the substrate. The method also includes depositing a high dielectric constant (high-k) material over the thin insulate, and then performing a hydrogen-based anneal on the high-k material. The method further includes performing an oxygen-based anneal on the high-k material, wherein the hydrogen-based and oxygen-based anneals occur sequentially.