Abstract: A computer program product method of circuit design of a multiple input circuit, macro or chip, especially for silicon on insulator (SOI) circuits. For a multiple input circuit, an object list of items corresponding to circuit devices is created. The items model local effects on corresponding circuit elements. The circuit is analyzed using Static or DC analysis to provide initial local effects on circuit devices, including body effects and local heat effects. The initial local effects are passed to the circuit model for transient analysis. The local effects from checked transient results are checked and updated. The transient response is rerun and the local effects are updated until the change in local effects is below an upper limit. For added efficiency, unswitching devices may be eliminated from the iterative analysis and analysis may be limited to the period when switching occurs.

Abstract: a field effect transistor having a channel width of such small dimension that threshold voltage becomes inversely related to channel width allowing the fabrication of field effect transistors of differing threshold voltages while using the same process steps. Reduced threshold voltage due to prior art "short channel length" effect may be offset by the presently disclosed narrow channel width effect. Desired chanel impedance values are achieved independently of threshold voltage influence due to narrow channel width effect by the provision of parallel-connected field effect transistors of the same channel length whose total channel widths yield a desired net width-to-length ratio.