Abstract: The present invention relates to a system for the manufacture of semiconductor devices by lithography, and in particular to an assembly of mask containers for use in such a system. The system comprises: a plurality of mask containers adapted to engage with one another such that two or more containers can be carried together as a stack; a plurality of lithography bays; a transport rail system for carrying the containers between different lithography bays. Each lithography bay has a transmitter/receiver unit for communicating lithography data with a tracking device located in each container, allowing for more efficient mask management. The transportation of the containers in stacks results in an improvement in efficiency.

Abstract: A semiconductor device on a wafer is formed by lithography with the following steps of: coating (13) a lithography resist onto said wafer in a coating means (5), exposing (14) said wafer to an irradiation through a reticle in an exposure tool (4), stabilizing (15) said lithography resist for activating chemical reaction and developing said lithography resist in said predetermined areas in a developer means (6) so as to reveal a predetermined lithography resist pattern on the wafer surface, stabilizing (16) the lithography resist in a stabilization means (7) for strengthening said pattern on the wafer surface, performing (17) a metrology inspection of said lithography resist pattern on said wafer surface in a metrology tool (8), etching, wet processing or implanting ions (18) into said wafer in a processing cell (9), wherein said metrology inspection is performed by atomic force microscopy in a atomic force microscopy module (11) immediately after developing and baking said lithography resist adjacent to said

Abstract: Chemical mechanical polishing (CMP) a metal film (155) at the surface of a substrate (150), with mixing a slurry precursor (201) with an oxidizing agent (202) to provide a slurry (200) with a predetermined agent concentration, and supplying the slurry to a CMP pad (140) to polish the film at a predetermined polishing rate is modified by altering the agent concentration at the end of polishing. Since the polishing rate is reduced, endpointing is enhanced. The concentration is altered by adding further oxidizing or reducing agents.

Abstract: The present invention relates to a system for the manufacture of semiconductor devices by lithography, and in particular to an assembly of mask containers for use in such a system. The system comprises: a plurality of mask containers adapted to engage with one another such that two or more containers can be carried together as a stack; a plurality of lithography bays; a transport rail system for carrying the containers between different lithography bays. Each lithography bay has a transmitter/receiver unit for communicating lithography data with a tracking device located in each container, allowing for more efficient mask management. The transportation of the containers in stacks results in an improvement in efficiency.

Abstract: Chemical mechanical polishing (CMP) a metal film (155) at the surface of a substrate (150), with mixing a slurry precursor (201) with an oxidizing agent (202) to provide a slurry (200) with a predetermined agent concentration, and supplying the slurry to a CMP pad (140) to polish the film at a predetermined polishing rate is modified by altering the agent concentration at the end of polishing. Since the polishing rate is reduced, endpointing is enhanced. The concentration is altered by adding further oxidizing or reducing agents.

Abstract: A lithography method and apparatus is provided for forming at least one semiconductor device on a wafer (12). The method comprises the step, exposing (21) said wafer to an irradiation through a reticle in an exposure tool (4), wherein said exposing (21) includes: at least one mounting step for mounting a first reticle (15) by a mounting device, at least one first exposure step (201), in which said wafer (12) is exposed to said irradiation through said predetermined first reticle (15), at least one change-over step (203) for removing said first reticle (15) and mounting a second predetermined reticle (18) by a change-over device, at least one second exposure step (201), in which said wafer (12) is exposed to said irradiation through said predetermined second reticle (18).

Abstract: In a lithography method with the steps coating (13) a lithography resist onto a wafer, exposing (14) the wafer, stabilizing (16), performing (17) a metrology inspection of the resulting lithography resist pattern, etching, and wet processing or implanting ions (18), for exposing, a reticle is aligned with respect to the wafer by atomic force microscopy in an atomic force microscopy (AFM) module (11).

Abstract: A semiconductor device on a wafer is formed by lithography with the following steps of: coating (13) a lithography resist onto said wafer in a coating means (5), exposing (14) said wafer to an irradiation through a reticle in an exposure tool (4), stabilizing (15) said lithography resist for activating chemical reaction and developing said lithography resist in said predetermined areas in a developer means (6) so as to reveal a predetermined lithography resist pattern on the wafer surface, stabilizing (16) the lithography resist in a stabilization means (7) for strengthening said pattern on the wafer surface, performing (17) a metrology inspection of said lithography resist pattern on said wafer surface in a metrology tool (8), etching, wet processing or implanting ions (18) into said wafer in a processing cell (9), wherein said metrology inspection is performed by atomic force microscopy in a atomic force microscopy module (11) immediately after developing and baking said lithography resist adjacent to said

Abstract: In a CVD chamber (120) having a chuck (122) to hold a semiconductor substrate (100) and having a plasma generator (121) to generate a plasma (125), a trench in the substrate is filled with dielectric material from ions (126) of the plasma. The ions are forced to move in a direction (127) that is substantially perpendicular to the surface of the substrate by a pulsed unidirectional voltage between the plasma generator and the substrate, by a circular magnetic field, or by a combination of both fields.

Abstract: The time required to make test measurements across a large diameter wafer, such as a 300 mm wafer, is reduced by using a wafer measuring system that employs theta (.theta.) and radial (r) control instead of X-Y control. In one embodiment, a measurement arm (14) having a measurement head (16) is positioned over a wafer chuck (18) and a wafer (12) is placed onto the wafer chuck (18). The wafer (12) is then moved to one or more measuring points below the measurement head (16) via theta rotation (.theta.) and radial positioning. A measurement is then taken at the selected location.

Abstract: Particles counts and concentrations are reduced from the backside of a substrate, such as a semiconductor wafer or flat panel display with the invention, to improve precision and uniformity in subsequent operations, including lithography operations. A semiconductor substrate is placed on a chuck (10) in a track system (30), such as a resist coater, a developer, or other form of spin coater. The substrate is processed accordingly to conventional practice and the substrate is removed. The chuck is then cleaned by dispensing a solvent, for example using EGMEA or PGMEA, through a dispense nozzle (38) of the system. Alternatively, or additionally, a brush (36) or sponge which is at least partially saturated with a solvent (39) is moved across the chuck to remove particles. The chuck cleaning can occur between every wafer, every wafer lot, or less periodically, such as between shifts, as the chuck particle accumulation dictates.

Abstract: The present disclosure is a method for in situ monitoring of backside contamination on a semiconductor wafer (120) between processing steps which are performed in a multi-chamber tool (500). In a first form, a laser source (220) and a detector (210) are mounted on a robotic arm (110, 111), or within a semiconductor processing tool (500). The laser (220) and detector (210) move along with the robotic arm (110) as the robotic arm (110) shuffles the wafer (120) between processing carriers (610-650) and chambers (510-540). While in transit the backside of the semiconductor wafer (120) is scanned by a laser beam (221), whereby contamination is detected by a detector (210). The laser (220) and detector (210) then scan the backside of the wafer (120) while the robotic arm (110) is in transit and/or while the robotic arm (110) is stationary in the processing sequence.

Abstract: A method for reducing particles (235) during a semiconductor process. A semiconductor substrate (230) is placed into a processing chamber (210). A processing pressure (108) is applied within the chamber (212). A processing power (102) is applied to the chamber. A grid power (104,106) for removing particles (235) is applied to the chamber (212). The processing power (102) is removed. The grid power (106) is removed after the processing power (102).

Abstract: The present invention incorporates an electrically-controlled grid (250) between a liner (220) and an isolation region (252) of a processing chamber (210). The electrically-controlled grid (250) is powered during a processing step of a semiconductor substrate (230) such that particles (235) suspended in the processing chamber (212) are attracted toward the grid (250) and away from the semiconductor substrate (230). A non-adhesive liner (220) is utilized to allow particles (235) and polymers to be directed toward a pumping port (239).