Abstract: The invention relates to a circuit arrangement for coding or decoding comprising apparatus for forming check bits with the use of a linear code. The coding should be capable of adaptation to a desired coding scheme in the simplest manner. The invention provides a binary memory which stores each digit position of the binary information and has an allocated check digit position word. There is connected to the output side of the memory a modulo-2-adder cricuit for the purpose of adding check digit position words, and depending upon the binary information received, indicates whether or not it is correct. A circuit arrangement in accordance with the invention is particularly suited for utilization in remote control installations.