Patents by Inventor Karl I. Taht

Karl I. Taht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11042403
    Abstract: A computing platform, including: an execution unit to execute a program, the program including a first phase and a second phase; and a quick response module (QRM) to: receive a program phase signature for the first phase; store the program phase signature in a pattern match action (PMA) table; identify entry of the program into the first phase via the PMA; and apply an optimization to the computing platform.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: June 22, 2021
    Assignee: Intel Corporation
    Inventors: Christopher B. Wilkerson, Karl I. Taht, Ren Wang, James J. Greensky, Tsung-Yuan C. Tai
  • Patent number: 10482017
    Abstract: Processor, method, and system for tracking partition-specific statistics across cache partitions that apply different cache management policies is described herein. One embodiment of a processor includes: a cache; a cache controller circuitry to partition the cache into a plurality of cache partitions based on one or more control addresses; a cache policy assignment circuitry to apply different cache policies to different subsets of the plurality of cache partitions; and a cache performance monitoring circuitry to track cache events separately for each of the cache partitions and to provide partition-specific statistics to allow comparison between the plurality of cache partitions as a result of applying the different cache policies in a same time period.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Karl I. Taht, Christopher B. Wilkerson, Ren Wang, James J. Greensky
  • Publication number: 20190102302
    Abstract: Processor, method, and system for tracking partition-specific statistics across cache partitions that apply different cache management policies is described herein. One embodiment of a processor includes: a cache; a cache controller circuitry to partition the cache into a plurality of cache partitions based on one or more control addresses; a cache policy assignment circuitry to apply different cache policies to different subsets of the plurality of cache partitions; and a cache performance monitoring circuitry to track cache events separately for each of the cache partitions and to provide partition-specific statistics to allow comparison between the plurality of cache partitions as a result of applying the different cache policies in a same time period.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Inventors: Karl I. Taht, Christopher B. Wilkerson, Ren Wang, James J. Greensky
  • Publication number: 20190012200
    Abstract: A computing platform, including: an execution unit to execute a program, the program including a first phase and a second phase; and a quick response module (QRM) to: receive a program phase signature for the first phase; store the program phase signature in a pattern match action (PMA) table; identify entry of the program into the first phase via the PMA; and apply an optimization to the computing platform.
    Type: Application
    Filed: July 10, 2017
    Publication date: January 10, 2019
    Applicant: INTEL CORPORATION
    Inventors: Christopher B. Wilkerson, Karl I. Taht, Ren Wang, James J. Greensky, Tsung-Yuan C. Tai