Patents by Inventor Karl-Josef Kramer

Karl-Josef Kramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9397250
    Abstract: According to one embodiment, a releasing apparatus for separating a semiconductor substrate from a semiconductor template, the releasing apparatus having an enclosed pressure chamber having at least one gas inlet and at least one gas outlet. A top vacuum chuck for securing a released semiconductor substrate or semiconductor template in the enclosed pressure chamber. A bottom vacuum chuck for securing an attached semiconductor substrate and semiconductor template in the enclosed pressure chamber. A gap between the attached semiconductor substrate and semiconductor template and the top vacuum chuck allowing gas flowing through the gap to generate lifting forces on the attached semiconductor substrate and semiconductor template.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: July 19, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Sam Tone Tor, Karl-Josef Kramer
  • Publication number: 20160186358
    Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
    Type: Application
    Filed: July 6, 2015
    Publication date: June 30, 2016
    Inventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
  • Patent number: 9337374
    Abstract: Processing equipment for the metallization of a plurality of semiconductor workpieces. A controlled atmospheric non-oxidizing gas region comprises at least two enclosed deposition zones, the controlled atmospheric non-oxidizing gas region is isolated from external oxidizing ambient. A temperature controller adjusts the temperature of the semiconductor workpiece in each of the at least two enclosed deposition zones. Each of the enclosed deposition zones comprising at least one spray gun for the metallization of the semiconductor workpiece. A transport system moves the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. A batch carrier plate carries the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. The controlled atmospheric non-oxidizing gas region further comprises a gas-based pre-cleaning zone.
    Type: Grant
    Filed: December 23, 2012
    Date of Patent: May 10, 2016
    Assignee: Solexel, Inc.
    Inventors: Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Anthony Calcaterra, David Dutton, Pawan Kapur, Sean Seutter, Homi Fatemi
  • Publication number: 20160013335
    Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepreg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepreg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepreg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepreg backplane.
    Type: Application
    Filed: February 5, 2015
    Publication date: January 14, 2016
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, Sean M. Seutter, Pawan Kapur, Thom Stalcup, David Xuan-Qi Wang, George D. Kamian, Kamran Manteghi, Yen-Sheng Su, Pranav Anbalagan, Virendra V. Rana, Anthony Calcaterra, Gerry Olsen, Wojciech Worwag
  • Patent number: 9196759
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: November 24, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Publication number: 20150315719
    Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).
    Type: Application
    Filed: April 6, 2015
    Publication date: November 5, 2015
    Inventors: George D. Kamian, Somnath Nag, Subbu Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara
  • Publication number: 20150308008
    Abstract: An apparatus for anodizing substrates immersed in an electrolyte solution. A substrate holder mounted in a storage tank includes a first support unit having first support elements for supporting, in a liquid-tight condition, portions of the substrates, and a second support unit attachable to and detachable from the first support unit and having second support elements for supporting, in a liquid-tight condition, the remaining portions of the substrates. The second support unit includes a first portion second support unit having support elements for supporting first portions of the remaining portions of the surfaces of the substrates, and a second portion second support unit having support elements for supporting second portions of the remaining portions of the surfaces of the substrates.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 29, 2015
    Inventors: Yasuyoshi MIYAJI, Noriyuki HAYASHI, Takamitsu INAHARA, Takao YONEHARA, Karl-Josef KRAMER, Subramanian TAMILMANI
  • Publication number: 20150299892
    Abstract: It is an object of this disclosure to provide high productivity, low cost-of-ownership manufacturing equipment for the high volume production of photovoltaic (PV) solar cell device architecture. It is a further object of this disclosure to reduce material processing steps and material cost compared to existing technologies by using gas-phase source silicon. The present disclosure teaches the fabrication of a sacrificial substrate base layer that is compatible with a gas-phase substrate growth process. Porous silicon is used as the sacrificial layer in the present disclosure. Further, the present disclosure provides equipment to produce a sacrificial porous silicon PV cell-substrate base layer.
    Type: Application
    Filed: January 5, 2015
    Publication date: October 22, 2015
    Inventors: Mehrdad M. Moslehi, Doug Crafts, Subramanian Tamilmani, Karl-Josef Kramer, George D. Kamian, Somnath Nag
  • Publication number: 20150243814
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Application
    Filed: February 23, 2015
    Publication date: August 27, 2015
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Publication number: 20150200313
    Abstract: Back contact solar cells having a discontinuous emitter comprising a plurality of emitter islands are provided. The back contact solar cell comprises a semiconductor layer with a background base doping and having a sunlight-receiving frontside and a backside opposite said sunlight-receiving frontside. An emitter layer having a doping opposite said semiconductor layer background doping is positioned on the semiconductor layer backside. A trench isolation pattern partitions the emitter layer and semiconductor layer into a plurality of discontinuous emitter regions on the semiconductor layer backside. At least one base island region contacting the semiconductor layer is positioned within each of the discontinuous emitter regions on the semiconductor layer backside.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 16, 2015
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer
  • Patent number: 9076642
    Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
    Type: Grant
    Filed: September 24, 2011
    Date of Patent: July 7, 2015
    Assignee: Solexel, Inc.
    Inventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
  • Publication number: 20150159292
    Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
    Type: Application
    Filed: December 8, 2014
    Publication date: June 11, 2015
    Applicant: Solexel, Inc.
    Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Subramanian Tamilmani, George D. Kamian, Jay Ashjaee, Takao Yonehara
  • Patent number: 9053957
    Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The reusable template has a three-dimensional (3-D) surface topography comprising a plurality of raised areas comprising a rounded top and separated by a plurality of depressed areas.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: June 9, 2015
    Assignee: Solexel, Inc.
    Inventors: Suketu Parikh, David Dutton, Pawan Kapur, Somnath Nag, Mehrdad M. Moslehi, Karl-Josef Kramer, Nevran Ozguven, Burcu Ucok
  • Publication number: 20150155398
    Abstract: Solar cell array solutions including monolithic solar cell arrays and fabrication methods. A first patterned cell metallization contacts base and emitter regions of each of a plurality of solar cells having a light receiving frontside and a backside. An electrically insulating continuous backplane layer is attached to the backside of the solar cells and covers the first cell metallization of each of the solar cells. Via holes through the continuous backplane layer provide access to the first cell metallization. A second cell metallization is connected to the first cell metallization of each of the solar cells and electrically interconnects the solar cells in the array.
    Type: Application
    Filed: September 24, 2014
    Publication date: June 4, 2015
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, Pawan Kapur, Thom Stalcup, Michael Wingert
  • Publication number: 20150144190
    Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.
    Type: Application
    Filed: February 2, 2015
    Publication date: May 28, 2015
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Karl-Josef Kramer, Sean M. Seutter, Sam Tone Tor, Anthony Calcaterra
  • Publication number: 20150129031
    Abstract: A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 ?m, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 14, 2015
    Inventors: Mehrdad M. Moslehi, Thom Stalcup, Karl-Josef Kramer, Anthony Calcaterra, Virendra V. Rana, Sean M. Seutter, Pawan Kapur, Michael Wingert
  • Publication number: 20150129017
    Abstract: A lamination stack for etching solar cells is provided. At least two solar cell wafers are attached to corresponding backplane sheets which are larger than the solar cell wafers. Release layers larger than the solar cells and smaller than the backplane sheets are positioned on the backplane sheets on the opposite side of the attached solar cell wafers. The backplane sheets are bonded together along the exposed peripheral boundary formed by the release layers.
    Type: Application
    Filed: July 8, 2014
    Publication date: May 14, 2015
    Inventors: David Dutton, Pranav Anbalagan, Karl-Josef Kramer, Mehrdad M. Moslehi
  • Patent number: 8999058
    Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: April 7, 2015
    Assignee: Solexel, Inc.
    Inventors: George D. Kamian, Somnath Nag, Subbu Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara
  • Patent number: 8992746
    Abstract: An apparatus for anodizing substrates immersed in an electrolyte solution. A substrate holder mounted in a storage tank includes a first support unit having first support elements for supporting, in a liquid-tight condition, only lower circumferential portions of the substrates, and a second support unit attachable to and detachable from the first support unit and having second support elements for supporting, in a liquid-tight condition, remaining circumferential portions of the substrates. A drive mechanism separates the first support unit and the second support unit when loading and unloading the substrates, and for connecting the first support unit and the second support unit after the substrates are placed in the substrate holder.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: March 31, 2015
    Assignees: Dainippon Screen Mfg. Co., Ltd., Solexel, Inc.
    Inventors: Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara, Takao Yonehara, Karl-Josef Kramer, Subramanian Tamilmani
  • Patent number: 8962380
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: February 24, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean Seutter, Virenda V Rana, Anthony Calcaterra, Emmanuel Van Kerschaver