Abstract: An electronic circuit includes an electronic switch having a control terminal and a load path and also includes a monitoring circuit comprising a switched-capacitor circuit with at least one capacitive storage element. The switched-capacitor circuit coupled to the load path of the electronic switch. The circuit can be operated by using the monitoring circuit to evaluate a load voltage of the electronic switch and to generate a failure signal dependent on the evaluation and providing a drive signal at the control terminal of the electronic switch dependent on the failure signal.

Abstract: An embodiment bus device with a programmable address includes a bus communication circuit connected to a bus terminal, a first pin terminal, a memory having a first register with a first address stored therein and a second register, and a state logic circuit. The state logic circuit detects a chip select signal on the first pin terminal, receives a first message through the bus communication circuit while the chip select signal is asserted, determines that the first message indicates an address set command, and saves an address value in the first message as a second address in the second register in response to a target address in the first message matching the first address. The state logic circuit further processes a second message received through the bus communication circuit in response to a target address of the second message matching the second address.

Abstract: In accordance with an embodiment of the present invention, a circuit includes a configurable clamp driver circuit for clamping a voltage at a gate terminal of a transistor below a turn-on voltage threshold upon switch-off of the transistor. In a first clamp driver circuit mode, an output terminal of the clamp driver circuit is configured to be coupled to the gate terminal of the transistor to provide a first discharge path from the gate terminal of the transistor upon switch-off of the transistor. In a second clamp driver circuit mode, the output terminal of the clamp driver circuit is configured to be coupled to an input terminal of a clamp circuit, wherein the clamp circuit is coupled to the gate terminal of the transistor to provide a second discharge path from the gate terminal of the transistor upon switch-off of the transistor.

Abstract: A method for operating a gate driver circuit includes supplying power to the gate driver circuit from a power supply including a positive power supply voltage and a negative power supply voltage. The method also includes comparing the negative power supply voltage with a first voltage at an output terminal of a transistor, wherein the gate driver circuit is coupled to a gate terminal of the transistor. The method also includes operating the gate driver circuit when the negative power supply voltage is more negative than a trigger voltage, wherein the trigger voltage is a predetermined voltage above the first voltage. The method also includes deactivating at least a portion of the gate driver circuit when the negative power supply voltage is more positive than the trigger voltage.

Abstract: A system and method for an overcurrent detector includes a device. The device includes a threshold generation circuit, and an overpower determination circuit. The threshold generation circuit is configured to produce a threshold value based on an output of a temperature sensor proximate to a power transistor, and a maximum power dissipation in the power transistor. The overpower determination circuit is configured to determine an overpower state of the power transistor based on the threshold value and a switch voltage. The switch voltage is detected between a source and a drain or a collector and an emitter of the power transistor.

Abstract: In accordance with an embodiment, a method of driving a switching transistor includes receiving an activation signal for the switching transistor and generating a sequence of random values. Upon receipt of the activation signal, a control node of the switching transistor is driven with a drive strength based on a random value of the sequence of random values.

Abstract: A tracking current sense system is described that includes a current source and a current control device. The current source alternatively and substantially replicates a first current flowing through a first switch and a second current flowing through a second switch. The current control device configures the current source to alternate between replicating the first current and the second current.

Abstract: In accordance with an embodiment, a method of driving a switching transistor includes receiving an activation signal for the switching transistor and generating a sequence of random values. Upon receipt of the activation signal, a control node of the switching transistor is driven with a drive strength based on a random value of the sequence of random values.

Abstract: A tracking current sense system is described that includes a first current tracking system, a second current tracking system, and a pre-biasing device. The first current tracking system is configured to replicate a first current flowing through a first switch and the second current tracking system is configured to replicate a second current flowing through a second switch. The pre-biasing device is configured to pre-bias the second current tracking system based on first information detected at the first current tracking system that is indicative of the first current and also, pre-bias the first current tracking system based on second information detected at the second current tracking system that is indicative of the second current.

Abstract: A power stage of a voltage regulator includes a first switch for connecting a load to a supply voltage in a first switching state of the power stage, a second switch for connecting the load to ground in a second switching state of the power stage and driver circuitry for setting the power stage in the first switching state, the second switching state or a non-switching state in which both switches are off responsive to a switching control signal received by the power stage. A power management unit moves the power stage from a nominal power mode to a first low power mode if the power stage is in the non-switching state for a predetermined time period.

Abstract: In accordance with an embodiment, a method of driving a switching transistor includes receiving an activation signal for the switching transistor and generating a sequence of random values. Upon receipt of the activation signal, a control node of the switching transistor is driven with a drive strength based on a random value of the sequence of random values.

Abstract: A method can be used for driving a switch circuit. The switch circuit includes a first transistor device and a second transistor device. Both the first transistor device and the second transistor device have a load path and a control terminal. The load paths of the first transistor device and the second transistor device are connected in series. The control terminal of the first transistor device is configured to receive a first drive signal and the control terminal of the second transistor device is configured to receive a second drive signal. One of an on-level switching on the first transistor device or an off-level switching off the first transistor device of the first drive signal is selected and one of a first signal level and a second signal level of the second drive signal is selected.

Abstract: A tracking current sense system is described that includes a first current tracking system, a second current tracking system, and a pre-biasing device. The first current tracking system is configured to replicate a first current flowing through a first switch and the second current tracking system is configured to replicate a second current flowing through a second switch. The pre-biasing device is configured to pre-bias the second current tracking system based on first information detected at the first current tracking system that is indicative of the first current and also, pre-bias the first current tracking system based on second information detected at the second current tracking system that is indicative of the second current.

Abstract: A tracking current sense system is described that includes a current source and a current control device. The current source alternatively and substantially replicates a first current flowing through a first switch and a second current flowing through a second switch. The current control device configures the current source to alternate between replicating the first current and the second current.

Abstract: A power circuit is described that includes a transformer having a primary winding and a secondary winding, a primary side coupled to the primary winding and a secondary side coupled to the secondary winding. The primary side includes a primary element configured to switch-on or switch-off based on a primary voltage or a primary current at the primary side. The secondary side includes a secondary element and a control unit that is isolated from the primary side. The control unit is configured to control the secondary element to transfer secondary side energy, via the transformer, from the secondary side to the primary side to control an amount of primary side energy transferred, via the transformer, from the primary side to the secondary side.

Abstract: An electronic circuit includes an electronic switch having a control terminal and a load path and also includes a monitoring circuit comprising a switched-capacitor circuit with at least one capacitive storage element. The switched-capacitor circuit coupled to the load path of the electronic switch. The circuit can be operated by using the monitoring circuit to evaluate a load voltage of the electronic switch and to generate a failure signal dependent on the evaluation and providing a drive signal at the control terminal of the electronic switch dependent on the failure signal.

Abstract: A power stage of a voltage regulator includes a first switch for connecting a load to a supply voltage in a first switching state of the power stage, a second switch for connecting the load to ground in a second switching state of the power stage and driver circuitry for setting the power stage in the first switching state, the second switching state or a non-switching state in which both switches are off responsive to a switching control signal received by the power stage. A power management unit moves the power stage from a nominal power mode to a first low power mode if the power stage is in the non-switching state for a predetermined time period.

Abstract: An electronic circuit includes an electronic switch having a control terminal and a load path. A monitoring circuit includes a switched-capacitor circuit with a capacitive storage element. The switched-capacitor circuit is coupled to the load path of the electronic switch. The monitoring circuit is operable to evaluate a load voltage of the electronic switch and to generate a failure signal dependent on the evaluation. A drive circuit is operable to provide a drive signal at the control terminal of the electronic switch dependent on the failure signal.

Abstract: A power circuit is described that includes a half-bridge and a driver for controlling a first switch of the half-bridge. The driver is configured to cause the first switch to transition between operating in an on-state of the first switch and an off-state of the first switch based at least in part on a driver signal and a voltage at the half-bridge.

Abstract: In accordance with an embodiment, a driver circuit includes a low-side driver having a first output configured to be coupled to a control node of a first semiconductor switch, and a reference input configured to be coupled to a reference node of the first semiconductor switch. The low-side driver also includes a first capacitor coupled between an output node of the first semiconductor switch and a first node, a first diode coupled between the first node and a first power input of the driver, and a second capacitor coupled between the first power input of the low-side driver and the reference node of the first semiconductor switch.