Abstract: A system for correcting burst errors with a maximum length of b bits in a reception signal, according to an error trapping method in cyclical block codes shortened by i bits, and wherein n bits are provided formed by r bits for a check part and k bits for the information. A syndrome register is provided having r stages. An overall input of the syndrome register is connected to a first exclusive-OR gate connected between two of the stages, a position of the first exclusive-OR gate being determined from coefficients of a pre-multiplication polynomial p.sub.2 (x). An output of a last stage of the syndrome register is connected via a switch to a first stage of the register and also to at least one further exclusive-OR gate connected between two stages of the register whose position is derived from a generator polynomial g(x) of the code. A zeros recognition unit is connected to each of the last r-b stages of the syndrome register.