Patents by Inventor Karol Szerszen

Karol Szerszen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260079905
    Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.
    Type: Application
    Filed: September 17, 2025
    Publication date: March 19, 2026
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Karol Szerszen, Eric Liskay, Karthik Vaidyanathan
  • Patent number: 12450218
    Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.
    Type: Grant
    Filed: August 7, 2024
    Date of Patent: October 21, 2025
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Karol Szerszen, Eric Liskay, Karthik Vaidyanathan
  • Publication number: 20250232397
    Abstract: Generation and storage of compressed z-planes in graphics processing is described. An example of a processor includes a rasterizer to generate a fragment of pixel data including blocks of pixel data; a depth pipeline to receive the fragment, the pipeline including a first and second depth test hardware, the first depth test hardware to perform a coarse depth test including determining minimum and maximum depths for each block; and a depth buffer, wherein the processor is to determine whether the fragment meets requirements that the fragment fully covers a tile of pixel data and passes a first depth test, and that each of the minimum and maximum depths of the fragment has a same sign and exponent, and, upon determining that the fragment meets the requirements, to generate a compressed depth plane utilizing the first depth test and update the depth buffer with the compressed depth plane.
    Type: Application
    Filed: January 17, 2025
    Publication date: July 17, 2025
    Applicant: Intel Corporation
    Inventors: Saikat Mandal, Karol Szerszen, Vasanth Ranganathan, Altug Koker, Michael Norris, Prasoonkumar Surti, Takahiro Murata
  • Patent number: 12236498
    Abstract: Generation and storage of compressed z-planes in graphics processing is described. An example of a processor includes a rasterizer to generate a fragment of pixel data including blocks of pixel data; a depth pipeline to receive the fragment, the pipeline including a first and second depth test hardware, the first depth test hardware to perform a coarse depth test including determining minimum and maximum depths for each block; and a depth buffer, wherein the processor is to determine whether the fragment meets requirements that the fragment fully covers a tile of pixel data and passes a first depth test, and that each of the minimum and maximum depths of the fragment has a same sign and exponent, and, upon determining that the fragment meets the requirements, to generate a compressed depth plane utilizing the first depth test and update the depth buffer with the compressed depth plane.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: February 25, 2025
    Assignee: INTEL CORPORATION
    Inventors: Saikat Mandal, Karol Szerszen, Vasanth Ranganathan, Altug Koker, Michael Norris, Prasoonkumar Surti, Takahiro Murata
  • Patent number: 12223585
    Abstract: Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.
    Type: Grant
    Filed: October 3, 2023
    Date of Patent: February 11, 2025
    Assignee: Intel Corporation
    Inventors: Karol Szerszen, Prasoonkumar Surti, Gabor Liktor, Karthik Vaidyanathan, Sven Woop
  • Publication number: 20250036608
    Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.
    Type: Application
    Filed: August 7, 2024
    Publication date: January 30, 2025
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Karol Szerszen, Eric Liskay, Karthik Vaidyanathan
  • Publication number: 20240354886
    Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
    Type: Application
    Filed: March 8, 2024
    Publication date: October 24, 2024
    Applicant: Intel Corporation
    Inventors: Sreenivas Kothandaraman, Karthik Vaidyanathan, Abhishek R. Appu, Karol Szerszen, Prasoonkumar Surti
  • Patent number: 12086120
    Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: September 10, 2024
    Assignee: INTEL CORPORATION
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Karol Szerszen, Eric Liskay, Karthik Vaidyanathan
  • Patent number: 11983791
    Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: May 14, 2024
    Assignee: Intel Corporation
    Inventors: Sreenivas Kothandaraman, Karthik Vaidyanathan, Abhishek R. Appu, Karol Szerszen, Prasoonkumar Surti
  • Publication number: 20240104825
    Abstract: Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.
    Type: Application
    Filed: October 3, 2023
    Publication date: March 28, 2024
    Inventors: Karol SZERSZEN, Prasoonkumar SURTI, Gabor LIKTOR, Karthik VAIDYANATHAN, Sven WOOP
  • Patent number: 11783530
    Abstract: Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: October 10, 2023
    Assignee: INTEL CORPORATION
    Inventors: Karol Szerszen, Prasoonkumar Surti, Gabor Liktor, Karthik Vaidyanathan, Sven Woop
  • Publication number: 20230252010
    Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.
    Type: Application
    Filed: December 15, 2022
    Publication date: August 10, 2023
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Karol Szerszen, Eric Liskay, Karthik Vaidyanathan
  • Patent number: 11556511
    Abstract: Embodiments are generally directed to compression for compression for sparse data structures utilizing mode search approximation. An embodiment of an apparatus includes one or more processors including a graphics processor to process data; and a memory for storage of data, including compressed data. The one or more processors are to provide for compression of a data structure, including identification of a mode in the data structure, the data structure including a plurality of values and the mode being a most repeated value in a data structure, wherein identification of the mode includes application of a mode approximation operation, and encoding of an output vector to include the identified mode, a significance map to indicate locations at which the mode is present in the data structure, and remaining uncompressed data from the data structure.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: January 17, 2023
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Karol Szerszen, Eric Liskay, Karthik Vaidyanathan
  • Publication number: 20220383444
    Abstract: Generation and storage of compressed z-planes in graphics processing is described. An example of a processor includes a rasterizer to generate a fragment of pixel data including blocks of pixel data; a depth pipeline to receive the fragment, the pipeline including a first and second depth test hardware, the first depth test hardware to perform a coarse depth test including determining minimum and maximum depths for each block; and a depth buffer, wherein the processor is to determine whether the fragment meets requirements that the fragment fully covers a tile of pixel data and passes a first depth test, and that each of the minimum and maximum depths of the fragment has a same sign and exponent, and, upon determining that the fragment meets the requirements, to generate a compressed depth plane utilizing the first depth test and update the depth buffer with the compressed depth plane.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Applicant: Intel Corporation
    Inventors: Saikat Mandal, Karol Szerszen, Vasanth Ranganathan, Altug Koker, Michael Norris, Prasoonkumar Surti, Takahiro Murata
  • Publication number: 20220262063
    Abstract: Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 18, 2022
    Inventors: Karol SZERSZEN, Prasoonkumar SURTI, Gabor LIKTOR, Karthik VAIDYANATHAN, Sven WOOP
  • Publication number: 20220084156
    Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
    Type: Application
    Filed: September 14, 2020
    Publication date: March 17, 2022
    Applicant: Intel Corporation
    Inventors: Sreenivas Kothandaraman, Karthik Vaidyanathan, Abhishek R. Appu, Karol Szerszen, Prasoonkumar Surti
  • Patent number: 11263800
    Abstract: Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: March 1, 2022
    Assignee: INTEL CORPORATION
    Inventors: Karol Szerszen, Prasoonkumar Surti, Gabor Liktor, Karthik Vaidyanathan, Sven Woop
  • Publication number: 20210201558
    Abstract: Apparatus and method for grouping rays based on quantized ray directions. For example, one embodiment of an apparatus comprises: An apparatus comprising: a ray generator to generate a plurality of rays; ray direction evaluation circuitry/logic to generate approximate ray direction data for each of the plurality of rays; ray sorting circuitry/logic to sort the rays into a plurality of ray queues based, at least in part, on the approximate ray direction data.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Inventors: KAROL SZERSZEN, PRASOONKUMAR SURTI, GABOR LIKTOR, KARTHIK VAIDYANATHAN, SVEN WOOP
  • Publication number: 20210149811
    Abstract: An apparatus to facilitate packing compressed data is disclosed. The apparatus includes compression hardware to compress memory data into a plurality of compressed data components and packing hardware to receive the plurality of compressed data components and pack a first of the plurality of compressed data components beginning at a least significant bit (LSB) location of a compressed bit stream and pack a second of the plurality of compressed data components beginning at a most significant bit (MSB) of the compressed bit stream.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 20, 2021
    Applicant: Intel Corporation
    Inventors: ABHISHEK R. APPU, PRASOONKUMAR SURTI, KARTHIK VAIDYANATHAN, KAROL SZERSZEN
  • Patent number: 10937225
    Abstract: Apparatus and method including cell primitive for unstructured volume rendering. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct a hierarchical acceleration data structure comprising a plurality of hierarchically arranged nodes including leaf nodes and inner nodes; traversal circuitry to traverse one or more of the rays through the hierarchical acceleration data structure; unstructured volume intersection circuitry to intersect a ray with an unstructured volume primitive within a leaf node of the hierarchical acceleration data structure, the unstructured volume intersection circuitry to determine multiple intersection hits between a ray and an unstructured volume primitive.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Timothy Rowley, Won-Jong Lee, Karol Szerszen, Hiroshi Akiba, Alexey Supikov