Abstract: An eye surgery system includes an operating microscope having at least one camera, a data memory, a pattern generator, and a display apparatus. The operating microscope presents a microscope image of an eye, and the at least one camera records a camera image of the eye. The data memory stores data that represent at least one predetermined position, relative to the eye, of a trocar to be inserted into the eye. The pattern generator generates a pattern representing the predetermined position of the trocar on the basis of the data stored in the data memory and the camera image recorded by the camera, and the display apparatus overlays the pattern produced by the pattern generator on the microscope image of the eye.

Abstract: An eye surgery system includes an operating microscope having at least one camera, a data memory, a pattern generator, and a display apparatus. The operating microscope presents a microscope image of an eye, and the at least one camera records a camera image of the eye. The data memory stores data that represent at least one predetermined position, relative to the eye, of a trocar to be inserted into the eye. The pattern generator generates a pattern representing the predetermined position of the trocar on the basis of the data stored in the data memory and the camera image recorded by the camera, and the display apparatus overlays the pattern produced by the pattern generator on the microscope image of the eye.

Abstract: A time/space switching component is provided with multiple functionality that includes a time switching unit, of a space switching unit of a data channel sequence correction unit and of a control unit. As a result of corresponding mode selection, the different functionalities for a switching network are obtained with a single component, resulting in a significant reduction in an overall expenditure for development and manufacture.

Abstract: An apparatus and a method are provided for monitoring the switching paths of a time/space coupling network in a coupling network (SN), having an originating address generator (UAG) for generating an originating address (UA) to be switched, a target value address generator (SE) for producing an expected target value address, and a comparator apparatus (V) for acquiring and comparing a switched originating address (UA′) on a predetermined output line (AKL) of the time/space coupling network (ZRKN) with the expected target value address. In this way, the time/space coupling network can be monitored or, respectively, tested reliably and completely.

Abstract: A control interface unit (1) for the realization of a simultaneous controlling of at least two logical units is provided, as well as an appertaining method, in which a control field evaluation unit (2) evaluates a transmitted control field (SF) and produces a control value (SF′). Depending on the control value (SF′), an address field conversion unit (3) converts a transmitted address field (AF) into a relevant address (ASIC-Adr), by which a data field selection unit (4) selects, dependent on the control value (SF′), a data field (DF1, DF2) that fits the address. In this way, one obtains, with the use of a common control interface, a simple and economical simultaneous controlling of at least two logical units.

Abstract: A method for locating a synchronization sequence S having a length s in a serial bit stream, and an arrangement for the implementation of such a method make use of the fact that the synchronization sequence S is composed of a plurality of individual words A, B, C having respective lengths a, b, c. The search in the serial bit stream relates only to a word length a, b, c and not to the entire length s of the synchronization sequence S. When a word A, B, C has been recognized, the expected value for the search for the next word A, B, C is set by a controller. The expected values for the words A, B, C to be searched are programmable and thus can be freely defined for each application, so they can be selected in an application-specific manner. The words A, B, C to be searched can be characterized by two auxiliary bits Z whose formation is exactly inverted relative to that of normal data words A, B, C. This guarantees an unambiguous and dependable recognition of these words A, B, C.

Abstract: The invention relates to a data transfer interface for a switching network and to a test method for said network. According to the invention, a plurality of test channels (syn0 bis syn3, asw0 bis asw9, tstch) are included in a synchronous time-division multiplex frame comprising a plurality of payload channels (payld). In addition, each channel has additional test bits. A secure data transfer interface is thus obtained, which can be used for online monitoring.

Abstract: The invention is directed to a TSSI monitoring device as well as to an appertaining method with a TSSI insertion device (1) for inserting a TSSI monitoring value (D (t0)) into a predetermined data channel (tssi) of successive time frames to be switched, and with a difference forming mechanism (2) for forming a difference (&Dgr;=(D (t0)−D(t0+k)) of data contents of the switched, predetermined data channel for immediate successive time frames. In this way, a TSSI infringement can be identified in an especially simple and cost-beneficial way in a switching network.

Abstract: A time/space switching component is provided with multiple functionality that is essentially composed of a time switching unit (AMUXN, SMN), of a space switching unit (LM, RKMUXM). of a data channel sequence correction unit (BPMUXN, BPN, STN) and of a control unit (CMM). As a result of corresponding mode selection, one thus obtains the different functionalities for a switching network with a single component, resulting in a significant reduction in an overall expenditure for development and manufacture.

Abstract: An apparatus and a method are provided for monitoring the switching paths of a time/space coupling network in a coupling network (SN), having an originating address generator (UAG) for generating an originating address (UA) to be switched, a target value address generator (SE) for producing an expected target value address, and a comparator apparatus (V) for acquiring and comparing a switched originating address (UA′) on a predetermined output line (AKL) of the time/space coupling network (ZRKN) with the expected target value address. In this way, the time/space coupling network can be monitored or, respectively, tested reliably and completely.

Abstract: A control interface unit (1) for the realization of a simultaneous controlling of at least two logical units is provided, as well as an appertaining method, in which a control field evaluation unit (2) evaluates a transmitted control field (SF) and produces a control value (SF′). Depending on the control value (SF′), an address field conversion unit (3) converts a transmitted address field (AF) into a relevant address (ASIC-Adr), by which a data field selection unit (4) selects, dependent on the control value (SF′), a data field (DF1, DF2) that fits the address. In this way, one obtains, with the use of a common control interface, a simple and economical simultaneous controlling of at least two logical units.