Patents by Inventor Karthik Natarajan

Karthik Natarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8094476
    Abstract: A content addressable memory (CAM) of a data processing device can operate in a normal mode or a test mode. In the normal mode, the CAM provides a match value in response to determining that a received data value matches one of a plurality of values stored at memory locations of the CAM. In a test mode of operation, a plurality of test signals are applied to the CAM, and the CAM provides a match value in response to assertion of one of the test signals. The match value is applied to a functional module associated with the CAM to determine a test result. Accordingly, the test signals applied to the CAM provide a flexible way to generate match values and apply those values to the functional module during testing of the data processing device.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: January 10, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Joel Thornton Irby, Karthik Natarajan
  • Patent number: 7977977
    Abstract: A circuit including is disclosed. The circuit includes a precharge circuit configured to pull a dynamic node toward a voltage present on the voltage supply node during a precharge phase, and an evaluation circuit configured to, during an evaluation phase, pull the dynamic node toward a ground voltage responsive to a first input condition and configured to inhibit pulling of the dynamic node down responsive to a second input condition. A pull-up circuit coupled between the first dynamic node and the voltage supply node includes first and second pull-up transistors. The first pull-up transistor is configured to activate responsive to the precharge phase. The second pull-up transistor is configured to activate at a delay time subsequent to entry of the evaluation phase. When the first and second pull-up transistors are active, a pull-up path is provided between the dynamic node and the voltage supply node.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: July 12, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Karthik Natarajan, Giridhar Narayanaswami, Spencer M. Gold, Stephen Kosonocky, Ravi Jotwani, Michael Braganza
  • Publication number: 20100103712
    Abstract: In accordance with a specific embodiment of the present disclosure, a content addressable memory (CAM) of a data processing device can operate in a normal mode or a test mode. In the normal mode, the CAM provides a match value in response to determining that a received data value matches one of a plurality of values stored at memory locations of the CAM. In a test mode of operation, a plurality of test signals are applied to the CAM, and the CAM provides a match value in response to assertion of one of the test signals. The match value is applied to a functional module associated with the CAM to determine a test result. Accordingly, the test signals applied to the CAM provide a flexible way to generate match values and apply those values to the functional module during testing of the data processing device.
    Type: Application
    Filed: October 29, 2008
    Publication date: April 29, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Joel T. Irby, Karthik Natarajan