Patents by Inventor Karthikeyan Rajan

Karthikeyan Rajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11646186
    Abstract: A system includes a first type of sensor and an estimation system that is connected to first type of sensor. The estimation system is configured to (a) identify a best peak shape for estimation of known gas mixtures by analyzing characterization data across known gas mixtures, with added noise, using machine learning, (b) generate a plurality of actual peak shapes, in first type of sensor, for several different instances using standard gas mixtures to provide an actual peak shape among the plurality of peak shapes as calibrating input to calibrate first type of sensor and (c) calibrate first type of sensor by automatically adjusting parameters of first type of sensor for optimizing actual peak shape to match with desired peak shape.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: May 9, 2023
    Assignee: ATONARP INC.
    Inventor: Karthikeyan Rajan Madathil
  • Patent number: 11227753
    Abstract: System for quantifying a composition of a target sample based on a scan output of a first type of sensor includes a reference database, a custom database and a set of modules. The set of modules includes an analytical model creation module that creates an analytical model of the first type of sensor, a sample processing module that processes samples that include accurately known compositions using the first type of sensor under a standard pressure condition, a molecular fraction estimation module that estimates molecular fraction of the samples using an estimation method and the analytical model, an analytical model optimization module that optimizes the analytical model by comparing the molecular fraction of the samples with a pre-determined molecular fraction of the samples, and a target composition estimation module that estimates a composition of the target sample based on the scan output using the estimation method with the optimized analytical model.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: January 18, 2022
    Assignee: ATONARP INC.
    Inventor: Karthikeyan Rajan Madathil
  • Patent number: 11183376
    Abstract: A system for scanning a gas mixture using a sensor is disclosed. The system includes a matrix multiplication module configured to pre-multiply a B matrix with a diagonal matrix that is created with a vector of nominal concentration of the set of gases to obtain an adjusted B matrix (Ba) and a mass to charge ratio extraction module that is configured to select a set of mass to charge ratios for the set of gases to scan in a time budget based on the adjusted B matrix (Ba). The B matrix is a multiplication of P, T, C and R matrices, wherein P is a convolution matrix representing peak shapes, T is transmission efficiencies at each integral mass to charge ratio, R is relative ionization potentials for each gas and C is a reference spectrum representing idealized responses for each gas at the integral mass to charge ratio.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: November 23, 2021
    Assignee: ATONARP INC.
    Inventor: Karthikeyan Rajan Madathil
  • Publication number: 20200335316
    Abstract: A system includes a first type of sensor and an estimation system that is connected to first type of sensor. The estimation system is configured to (a) identify a best peak shape for estimation of known gas mixtures by analyzing characterization data across known gas mixtures, with added noise, using machine learning, (b) generate a plurality of actual peak shapes, in first type of sensor, for several different instances using standard gas mixtures to provide an actual peak shape among the plurality of peak shapes as calibrating input to calibrate first type of sensor and (c) calibrate first type of sensor by automatically adjusting parameters of first type of sensor for optimizing actual peak shape to match with desired peak shape.
    Type: Application
    Filed: January 8, 2019
    Publication date: October 22, 2020
    Applicant: ATONARP INC.
    Inventor: Karthikeyan Rajan MADATHIL
  • Publication number: 20200273686
    Abstract: A system for scanning a gas mixture using a sensor is disclosed. The system includes a matrix multiplication module configured to pre-multiply a B matrix with a diagonal matrix that is created with a vector of nominal concentration of the set of gases to obtain an adjusted B matrix (Ba) and a mass to charge ratio extraction module that is configured to select a set of mass to charge ratios for the set of gases to scan in a time budget based on the adjusted B matrix (Ba). The B matrix is a multiplication of P, T, C and R matrices, wherein P is a convolution matrix representing peak shapes, T is transmission efficiencies at each integral mass to charge ratio, R is relative ionization potentials for each gas and C is a reference spectrum representing idealized responses for each gas at the integral mass to charge ratio.
    Type: Application
    Filed: November 21, 2017
    Publication date: August 27, 2020
    Applicant: Atonarp Inc.
    Inventor: Karthikeyan Rajan MADATHIL
  • Publication number: 20190221412
    Abstract: System for quantifying a composition of a target sample based on a scan output of a first type of sensor includes a reference database, a custom database and a set of modules. The set of modules includes an analytical model creation module that creates an analytical model of the first type of sensor, a sample processing module that processes samples that include accurately known compositions using the first type of sensor under a standard pressure condition, a molecular fraction estimation module that estimates molecular fraction of the samples using an estimation method and the analytical model, an analytical model optimization module that optimizes the analytical model by comparing the molecular fraction of the samples with a pre-determined molecular fraction of the samples, and a target composition estimation module that estimates a composition of the target sample based on the scan output using the estimation method with the optimized analytical model.
    Type: Application
    Filed: October 4, 2016
    Publication date: July 18, 2019
    Applicant: ATONARP INC.
    Inventor: Karthikeyan Rajan MADATHIL
  • Patent number: 9440324
    Abstract: In an angle valve, an externally threaded sleeve within the yoke surrounds the stem at an upper end of the stem. A yoke bushing fixed to the valve has internal threads matching with the external threading of the sleeve. A split collar assembly is located on the stem above the sleeve. The stem has a greater diameter itself, and/or via a nut, at a lower portion of the stem (below the sleeve) relative to the upper portion of stem. The plug stem is designed to pass through the yoke bushing making it possible to perform the normal open-close operation and grinding operation independently.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: September 13, 2016
    Assignee: Bray International, Inc.
    Inventors: Varadharajen Lakshmanan, Mathew Varghese, Karthikeyan Rajan, Laural Marshall
  • Publication number: 20140332089
    Abstract: In an angle valve, an externally threaded sleeve within the yoke surrounds the stem at an upper end of the stem. A yoke bushing fixed to the valve has internal threads matching with the external threading of the sleeve. A split collar assembly is located on the stem above the sleeve. The stem has a greater diameter itself, and/or via a nut, at a lower portion of the stem (below the sleeve) relative to the upper portion of stem. The plug stem is designed to pass through the yoke bushing making it possible to perform the normal open-close operation and grinding operation independently.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 13, 2014
    Applicant: Bray International, Inc.
    Inventors: Varadharajen Lakshmanan, Mathew Varghese, Karthikeyan Rajan, Laural Marshall
  • Patent number: 7580967
    Abstract: A method of operating a processor in a variable bit-length environment by performing a maximum limit function and minimum limit function. The method comprises accessing a most significant portion of a first number in a first register, wherein the most significant portion of the first number includes a first value. The method also includes accessing a most significant portion of a second number that includes a maximum/minimum limit, wherein the most significant portion of the second number includes a second value. The method includes changing the most significant portion of the first number to match the most significant portion of the second number if the first value is greater/less than the second value and storing the most significant portion of the first number in the first register.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: August 25, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Alexander Tessarolo, Karthikeyan Rajan Madathil, G. Subash Chandar
  • Patent number: 7321980
    Abstract: A system-on-chip integrated circuit selectively gates clocks to individual modules corresponding to the state of a corresponding bit of a peripheral enable register. A reset circuit supplies a signal to a reset input of the digital module for a normal mode if the bit indicates the power-up state and a reset mode if the bit indicates a power-down state. Return to normal mode is delayed a predetermined time after the said bit of indicates the power-up state to ensure clean power up. A false acknowledge circuit for each module supplies an acknowledge signal in response to a received command if the corresponding bit indicates the power-down state.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: January 22, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Subrangshu Kumar Das, Ashutosh Tiwari, Subash Chandar Govindarajan, Karthikeyan Rajan Madathil
  • Publication number: 20030163499
    Abstract: In one embodiment of the present invention, logic for limiting the value of a 64-bit number to a maximum limit in a 32-bit environment allocates one or more bit flags in a first operation. The logic accesses a most significant 32-bit portion of a first 64-bit number including a first value. The logic accesses a most significant 32-bit portion of a second 64-bit number including a maximum limit and a second value. The logic compares the first value with the second value and, if the first value is greater than the second value, sets the bit flags accordingly and changes the most significant 32-bit portion of the first 64-bit number to match the same of the second 64-bit number. If the first value is equal to the second value, the logic sets the one or more allocated bit flags accordingly. In a second operation following the first operation, the logic accesses the bit flags.
    Type: Application
    Filed: January 22, 2003
    Publication date: August 28, 2003
    Inventors: Alexander Tessarolo, Karthikeyan Rajan Madathil, G. Subash Chandar