Abstract: A method for monitoring device characteristics of semiconductor integrated circuits. The device characteristics includes censored data and uncensored data. The method includes determining a plurality of minimum breakdown voltages numbered from 1 through N, respectively, for a plurality of lots (e.g., wafer fabrication lots) numbered from 1 through N. Each of the plurality of minimum breakdown voltages is respectively indicative of the plurality of samples through order statistics. One or more of the plurality of samples includes one or more uncensored data points and one or more censored data points. The method includes processing the minimum breakdown voltages, respectively, for the plurality of lots. Each of the minimum breakdown voltages is processed for the respective plurality of lots and is indicative of a population characteristic breakdown voltage numbered from 1 through N for the respective lot numbered from 1 through N.

Abstract: The present invention discloses a burn-in testing system including a burn-in board and a burn-in testing apparatus, the burn-in board including: a first interface component, adapted to connect with the burn-in testing apparatus for signal input and/or output between the burn-in board and the burn-in testing apparatus; and a second interface component, adapted to connect with a device under test for signal input and/or output between the burn-in board and the device, wherein the burn-in testing system further includes a pin matching unit flexibly connected with the burn-in board and adapted to adjust signal connection relationship between the first interface component and the second interface component according to a pin description of the device.

Abstract: The present invention discloses a burn-in testing system including a burn-in board and a burn-in testing apparatus, the burn-in board including: a first interface component, adapted to connect with the burn-in testing apparatus for signal input and/or output between the burn-in board and the burn-in testing apparatus; and a second interface component, adapted to connect with a device under test for signal input and/or output between the burn-in board and the device, wherein the burn-in testing system further includes a pin matching unit flexibly connected with the burn-in board and adapted to adjust signal connection relationship between the first interface component and the second interface component according to a pin description of the device.

Abstract: A method for determining whether a first group of a product, a component or a system in reliability life testing has longer lifetime than a second group. This method is non-parametric and free from a pre-assumption of statistical distributions and can be applied to all kinds of data and distributions. Errors from goodness-of-fit of distribution fitting and parameter estimations are thus eliminated. After pre-check on bimodal, early failures, and the failure mechanisms, the method employs numerical solutions with good accuracy by the nonparametric approach. The data under consideration can be censored, interval or bimodal, and not limited to simple cases of complete type. The method can be used to determine multiplicities of reliability tests for all product types and at all levels. Based on a comparability index derived from integrating the weighted difference between the reliability functions of the two groups under comparison. Several indices are proposed for effectiveness of reliability comparability.

Abstract: A method and system for multi-point (e.g., double-point) GOI test that can efficiently judge failure modes by testing only two points. We can measure leakage currents at only two voltages, which are the cut points of mode A-B and B-C, instead of the whole ramped voltages to save time and cost with the same test effectiveness according to a specific embodiment. By correlating leakage current at extrinsic field to the breakdown voltage, we can also evaluate the intrinsic reliability even if the samples are not subjected to actual breakdown according to a specific embodiment.

Abstract: A method for manufacturing semiconductor devices or other types of devices and/or entities. The method includes providing a process (e.g., etching, deposition, implantation) associated with a manufacture of a semiconductor device/ The method includes collecting a plurality information (e.g., data) having a non-monotonic trend of at least one parameter associated with the process over a determined period. The method includes processing the plurality of information having the non-monotonic trend. The method includes detecting an increasing or a decreasing trend from the processed plurality of information having the non-monotonic trend. The method includes performing an action based upon at least the detected increasing or decreasing trend.

Abstract: A method for monitoring device characteristics of semiconductor integrated circuits. The device characteristics includes censored data and uncensored data. The method includes determining a plurality of minimum breakdown voltages numbered from 1 through N, respectively, for a plurality of lots (e.g., wafer fabrication lots) numbered from 1 through N. Each of the plurality of minimum breakdown voltages is respectively indicative of the plurality of samples through order statistics. One or more of the plurality of samples includes one or more uncensored data points and one or more censored data points. The method includes processing the minimum breakdown voltages, respectively, for the plurality of lots. Each of the minimum breakdown voltages is processed for the respective plurality of lots and is indicative of a population characteristic breakdown voltage numbered from 1 through N for the respective lot numbered from 1 through N.

Abstract: A method for testing a semiconductor wafer using an in-line process control, e.g., within one or more manufacturing processes in a wafer fabrication facility and/or test/sort operation. The method includes transferring a semiconductor wafer to a test station. The method includes applying an operating voltage on a gate of a test pattern on a semiconductor wafer using one or more probing devices. The method includes measuring a first leakage current associated with the operating voltage. If the measured first current is higher than a first predetermined amount, the device is an initial failure. If the measured first current is below the first predetermined amount, the device is subjected to a second voltage. The method includes applying the second voltage on the gate of the test pattern on the semiconductor wafer and measuring a second leakage current associated with the second voltage. If the second measured leakage current is higher than a second predetermined amount, the device is an extrinsic failure.

Abstract: A method and system for multi-point (e.g., double-point) GOI test that can efficiently judge failure modes by testing only two points. We can measure leakage currents at only two voltages, which are the cut points of mode A-B and B-C, instead of the whole ramped voltages to save time and cost with the same test effectiveness according to a specific embodiment. By correlating leakage current at extrinsic field to the breakdown voltage, we can also evaluate the intrinsic reliability even if the samples are not subjected to actual breakdown according to a specific embodiment.

Abstract: A method for testing a semiconductor wafer using an in-line process control, e.g., within one or more manufacturing processes in a wafer fabrication facility and/or test/sort operation. The method includes transferring a semiconductor wafer to a test station. The method includes applying an operating voltage on a gate of a test pattern on a semiconductor wafer using one or more probing devices. The method includes measuring a first leakage current associated with the operating voltage. If the measured first current is higher than a first predetermined amount, the device is an initial failure. If the measured first current is below the first predetermined amount, the device is subjected to a second voltage. The method includes applying the second voltage on the gate of the test pattern on the semiconductor wafer and measuring a second leakage current associated with the second voltage. If the second measured leakage current is higher than a second predetermined amount, the device is an extrinsic failure.

Abstract: A method and system for multi-point (e.g., double-point) GOI test that can efficiently judge failure modes by testing only two points. We can measure leakage currents at only two voltages, which are the cut points of mode A-B and B-C, instead of the whole ramped voltages to save time and cost with the same test effectiveness according to a specific embodiment. By correlating leakage current at extrinsic field to the breakdown voltage, we can also evaluate the intrinsic reliability even if the samples are not subjected to actual breakdown according to a specific embodiment.

Abstract: A method for testing a semiconductor wafer using an in-line process control, e.g., within one or more manufacturing processes in a wafer fabrication facility and/or test/sort operation. The method includes transferring a semiconductor wafer to a test station. The method includes applying an operating voltage on a gate of a test pattern on a semiconductor wafer using one or more probing devices. The method includes measuring a first leakage current associated with the operating voltage. If the measured first current is higher than a first predetermined amount, the device is an initial failure. If the measured first current is below the first predetermined amount, the device is subjected to a second voltage. The method includes applying the second voltage on the gate of the test pattern on the semiconductor wafer and measuring a second leakage current associated with the second voltage. If the second measured leakage current is higher than a second predetermined amount, the device is an extrinsic failure.

Abstract: A method for manufacturing semiconductor devices or other types of devices and/or entities. The method includes providing a process (e.g., etching, deposition, implantation) associated with a manufacture of a semiconductor device/The method includes collecting a plurality information (e.g., data) having a non-monotonic trend of at least one parameter associated with the process over a determined period. The method includes processing the plurality of information having the non-monotonic trend. The method includes detecting an increasing or a decreasing trend from the processed plurality of information having the non-monotonic trend. The method includes performing an action based upon at least the detected increasing or decreasing trend.