Abstract: Disclosed herein is a method and device for absolute average deviation (AAD) pooling for a convolutional neural network accelerator. AAD utilizes the spatial locality of pixels using vertical and horizontal deviations to achieve higher accuracy, lower area, and lower power consumption than mixed pooling without increasing the computational complexity. AAD achieves 98% accuracy with lower computational and hardware costs compared to mixed pooling, making it an ideal pooling mechanism for an IoT CNN accelerator.

Abstract: Disclosed herein is a method for making embryonic bio-inspired hardware efficient against faults through self-healing, fault prediction, and fault-prediction assisted self-healing. The disclosed self-healing recovers a faulty embryonic cell through innovative usage of healthy cells. Through experimentations, it is observed that self-healing is effective, but it takes a considerable amount of time for the hardware to recover from a fault that occurs suddenly without forewarning. To get over this problem of delay, novel deep learning-based formulations are utilized for fault predictions. The self-healing technique is then deployed along with the disclosed fault prediction methods to gauge the accuracy and delay of embryonic hardware.

Abstract: Hardware failures are undesired, but a common problem in circuits. Such failures are inherently due to the aging of circuitry or variation in circumstances. In critical systems, customers demand that the system never fail. Several self-healing and fault tolerance techniques have been proposed in the literature for recovering a circuitry from a fault. Such techniques are helpful when a fault has already occurred, but they are typically uninformed about the possibility of an impending failure (i.e., fault prediction), which can be used as a pre-stage to fault tolerance and self-healing. Presented herein is a method for early prediction of circuit faults. Using Fast Fourier Transformation (FFT), Principal Component Analysis (PCA), and Convolutional Neural Network (CNN), circuit faults can be predicted at a transistor level.

Abstract: Disclosed herein is a novel approach to Long Short-Term Memory (LSTM) that uses fewer units for processing than other LSTM systems currently available. This LSTM system has the ability to retain memory and learn data sequences using one gate. The benefit of the disclosed system is performing the learning process at a faster speed to the lower number computation units.