Abstract: Apparatuses, systems, and techniques for efficient high-precision floating-point matrix multiplication using dynamic precision adjustment are disclosed herein. The system may calculate an Exponent Cancellation Degree (ECD) representing potential precision loss during integer-based computation of floating-point matrix multiplication. A guard bit calculator may dynamically determine the required number of additional precision bits based on the calculated ECD value, enabling the system to determine when to use faster integer matrix multiplication accelerator (IMMA) hardware versus floating-point hardware. The system may employ optimization techniques, such as SIMD-compatible uniform extended bit count allocation for matrix tiles, two-tier approximation methods for efficient ECD estimation, and pipelined execution with concurrent processing stages.