Patents by Inventor Kathleen A. Capilupo

Kathleen A. Capilupo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5762511
    Abstract: A zero insertion force pin grid array socket includes a cover slidably engaged to a base and having an array of holes formed therethrough. The base has an array of corresponding passages, the passages receiving pins of an IC package inserted through corresponding holes of the cover. Contacts are mounted within the passages and include a generally tuning-fork shaped contact having torsional beams which deflect the insertion forces of the pin of the IC package which have a surface area of at least forty percent of the entire surface area of contacts. The contacts include wiping areas which are plated which have a surface area of less than an eightieth of the entire surface area of the contact. The socket cover includes a means for providing an air-gap between the socket cover and the IC package.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: June 9, 1998
    Assignee: Methode Eletronics, Inc.
    Inventors: John T. Scheitz, Michael V. Stefaniu, Kathleen A. Capilupo, Charles A. Kozel
  • Patent number: 5597319
    Abstract: A zero insertion force pin grid array socket includes a cover slidably engaged to a base and having an array of holes formed therethrough. The base has an array of corresponding passages, the passages receiving pins of an IC package inserted through corresponding holes of the cover. Contacts are mounted within the passages and are mounted at an angle askew to the sides of the base in order to provide a high density interstitial array. The contacts include torsional beams which deflect upon the engagement of the pin of the IC package which have a surface area of at least thirty percent of the entire surface area of contacts. The contacts include a wiping area which is plated which has a surface area of less than a fortieth of the entire surface area of the contact.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: January 28, 1997
    Assignee: Methode Electronics, Inc.
    Inventors: John T. Scheitz, Kathleen A. Capilupo
  • Patent number: 5494456
    Abstract: A wire-trap connector with a means for protecting the connector's contact from becoming overstressed. The connector housing has a connection passageway for providing access to the contact mounted within the connector. In addition, the connector housing has a release passageway, located separately from the connection passageway, which provides access to the contact. In order to release a wire from the contact, a wire extraction tool is inserted in the release passageway and presses against the contact. During the release of the wire from the connector, the contact has at least one tab projecting from it which will abut against an overstress stop abutment mounted within the connector housing. The restricted travel of the contact during the release of the wire will prevent the contact from becoming permanently deformed.
    Type: Grant
    Filed: October 3, 1994
    Date of Patent: February 27, 1996
    Assignee: Methode Electronics, Inc.
    Inventors: Charles A. Kozel, Kathleen A. Capilupo
  • Patent number: 5489217
    Abstract: A zero insertion force pin grid array socket includes a cover slidably engaged to a base and having an array of holes formed therethrough. The base has an array of corresponding passages, the passages receiving pins of an IC package inserted through corresponding holes of the cover. Contacts are mounted within the passages and include a generally tuning fork shaped contact having beams which deflect the insertion forces of the pin of the IC package which have a surface area of at least forty percent of the entire surface area of contacts. The contacts include wiping areas which are plated which have a surface area of less than an eightieth of the entire surface area of the contact. The socket cover includes a means for providing an air-gap between the socket cover and the IC package.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: February 6, 1996
    Assignee: Methode Electronics, Inc.
    Inventors: John T. Scheitz, Michael V. Stefaniu, Kathleen A. Capilupo