Abstract: A data receiver equalization technique utilizes a receiver clock that has a frequency different that the incoming data frequency (i.e., an “asynchronous clock”) to asynchronously sample the incoming data waveform. The resulting information about the data, typically including the rise and/or fall times, overshoot and/or undershoot, and amplitude, may be used to equalize a data channel. Other adjustments to the receiver, including the gain level and DC offset compensation, may also be made using the resulting information. An illustrative embodiment using clocked comparators, continuous-time comparators, and a statistical analysis circuit is shown.

Abstract: The invention is a receiver front end for a data communications system having adaptive correction for intersymbol interference, DC offset, baseline wander, and flat loss and related method. Each of the compensation circuits is adaptive and is controlled by adaptation logic via a digital feedback loop including a digital integrator for providing perfect or near-perfect integration of the adaptation algorithm feedback error signal. The architecture further utilizes multiple comparators, including continuous-time and clocked comparators, for separately detecting various aspects of the received data signals that are used to determine the signal degradation characteristics needed to generate error signals for the adaptation feedback loops.