Patents by Inventor Kathy D. Leganski

Kathy D. Leganski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Printed circuit board having closed vias
    Patent number: 7557304
    Abstract: Closed vias are formed in a multilayer printed circuit board by laminating a dielectric layer to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: July 7, 2009
    Assignee: Motorola, Inc.
    Inventors: Jaroslaw A. Magera, Gregory J. Dunn, Kathy D. Leganski
  • Method for fabricating closed vias in a printed circuit board
    Patent number: 7427562
    Abstract: A method for forming closed vias in a multilayer printed circuit board. A dielectric layer is laminated to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: September 23, 2008
    Assignee: Motorla, Inc.
    Inventors: Jaroslaw A. Magera, Gregory J. Dunn, Kathy D. Leganski
  • PRINTED CIRCUIT BOARD HAVING CLOSED VIAS
    Publication number: 20080121420
    Abstract: Closed vias are formed in a multilayer printed circuit board by laminating a dielectric layer to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.
    Type: Application
    Filed: November 8, 2006
    Publication date: May 29, 2008
    Applicant: Motorola, Inc.
    Inventors: Jaroslaw A. Magera, Gregory J. Dunn, Kathy D. Leganski
  • METHOD FOR FABRICATING CLOSED VIAS IN A PRINTED CIRCUIT BOARD
    Publication number: 20080119041
    Abstract: A method for forming closed vias in a multilayer printed circuit board. A dielectric layer is laminated to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.
    Type: Application
    Filed: November 8, 2006
    Publication date: May 22, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Jaroslaw A. Magera, Gregory J. Dunn, Kathy D. Leganski