Abstract: In one embodiment, a semiconductor storage device includes a string that has one end electrically connected to a bit line, and another end electrically connected to a source line, and includes a plurality of memory cells. An operation of writing data to each of a plurality of adjacent first memory cells among the plurality of memory cells is sequentially performed in a direction from a first memory cell on a side of the source line to a first memory cell on a side of the bit line. An operation of reading data from each of the plurality of adjacent first memory cells is performed to allow a current to flow through the string in a first direction from the source line to the bit line.

Abstract: A motor drive device includes a first drive circuit to control an energization period of a first upper arm switch and a first lower arm switch connected to one end of a coil, a second drive circuit to control an energization period of a second upper arm switch and a second lower arm switch connected to another end of the coil, a current detection circuit to detect current flowing through the coil and output a current detection signal indicating a detection result of the current, a first protection circuit to determine whether overcurrent has occurred based on the current detection signal and output a first enable signal indicating a determination result to the first drive circuit, and a second protection circuit to determine whether overcurrent has occurred based on the current detection signal and output a second enable signal indicating a determination result to the second drive circuit.

Abstract: A motor drive device includes a first drive circuit to control an energization period of a first upper arm switch and a first lower arm switch connected to one end of a coil, a second drive circuit to control an energization period of a second upper arm switch and a second lower arm switch connected to another end of the coil, a current detection circuit to detect current flowing through the coil and output a current detection signal indicating a detection result of the current, a first protection circuit to determine whether overcurrent has occurred based on the current detection signal and output a first enable signal indicating a determination result to the first drive circuit, and a second protection circuit to determine whether overcurrent has occurred based on the current detection signal and output a second enable signal indicating a determination result to the second drive circuit.