Patents by Inventor Katsuaki TOCHIBAYASHI

Katsuaki TOCHIBAYASHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935959
    Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: March 19, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Toshinari Sasaki, Katsuaki Tochibayashi, Shunpei Yamazaki
  • Patent number: 11908949
    Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, a first insulator over the third oxide, a conductor over the first insulator, a second insulator in contact with the second oxide and the third oxide, and a third insulator over the second insulator; the second oxide includes first region to fifth regions; the resistance of the first region and the resistance of the second region are lower than the resistance of the third region; the resistance of the fourth region and the resistance of the fifth region are lower than the resistance of the third region and higher than the resistance of the first region and the resistance of the second region; and the conductor is provided over the third region, the fourth region, and the fifth region to overlap with the third region, the fourth region, and the fifth region.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuki Hata, Katsuaki Tochibayashi, Junpei Sugao, Shunpei Yamazaki
  • Patent number: 11869979
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo, Kentaro Sugaya, Naoto Yamade
  • Patent number: 11817507
    Abstract: A semiconductor device having a high on-state current is provided. The semiconductor device includes a first oxide; a first conductor and a second conductor provided over the first oxide to be separated from each other; and a second oxide provided over the first oxide and between the first conductor and the second conductor. Each of the first oxide and the second oxide has crystallinity, the first oxide includes a region where a c-axis is aligned substantially perpendicularly to a top surface of the first oxide, and the second oxide includes a region where the c-axis is aligned substantially perpendicularly to the top surface of the first oxide, a region where the c-axis is aligned substantially perpendicularly to a side surface of the first conductor, and a region where the c-axis is aligned substantially perpendicularly to a side surface of the second conductor.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: November 14, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tsutomu Murakawa, Hiroki Komagata, Katsuaki Tochibayashi, Kentaro Sugaya
  • Publication number: 20230132598
    Abstract: A semiconductor device in which variations in characteristics, deterioration of elements, and abnormality in shape are inhibited is provided. The semiconductor device includes a first region including a plurality of elements and a second region including a plurality of dummy elements. The second region is provided in an outer edge of the first region, and the element and the dummy element each include an oxide semiconductor. The element and the dummy element have the same structure, and a structure body included in the element and a structure body included in the dummy element are formed with the same material and provided in the same layer. The oxide semiconductor includes In, an element M (M is Al, Ga, Y, or Sn), and Zn.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Erika TAKAHASHI, Katsuaki TOCHIBAYASHI, Ryo ARASAWA
  • Publication number: 20230109174
    Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, a first insulator over the third oxide, a conductor over the first insulator, a second insulator in contact with the second oxide and the third oxide, and a third insulator over the second insulator; the second oxide includes first region to fifth regions; the resistance of the first region and the resistance of the second region are lower than the resistance of the third region; the resistance of the fourth region and the resistance of the fifth region are lower than the resistance of the third region and higher than the resistance of the first region and the resistance of the second region; and the conductor is provided over the third region, the fourth region, and the fifth region to overlap with the third region, the fourth region, and the fifth region.
    Type: Application
    Filed: December 8, 2022
    Publication date: April 6, 2023
    Inventors: Yuki HATA, Katsuaki TOCHIBAYASHI, Junpei SUGAO, Shunpei YAMAZAKI
  • Publication number: 20230047805
    Abstract: A semiconductor device with a high on-state current is provided. An oxide semiconductor film; a source electrode and a drain electrode over the oxide semiconductor film; an interlayer insulating film positioned to cover the oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the oxide semiconductor film; a barrier insulating film over the oxide semiconductor film; and a gate electrode over the gate insulating film are included. The barrier insulating film is positioned between the source electrode and the gate insulating film and between the drain electrode and the gate electrode. An opening is formed in the interlayer insulating film so as to overlap with a region between the source electrode and the drain electrode. The barrier insulating film, the gate insulating film, and the gate electrode are positioned in the opening of the interlayer insulating film.
    Type: Application
    Filed: January 7, 2021
    Publication date: February 16, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryota HODO, Katsuaki TOCHIBAYASHI, Kentaro SUGAYA
  • Publication number: 20230044086
    Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
    Type: Application
    Filed: October 12, 2022
    Publication date: February 9, 2023
    Inventors: Junichi KOEZUKA, Toshinari SASAKI, Katsuaki TOCHIBAYASHI, Shunpei YAMAZAKI
  • Publication number: 20230034397
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a transistor including a gate electrode, a source electrode, and a drain electrode; a first insulator over the transistor; a second insulator over the first insulator; a third insulator over the second insulator; a first electrode in contact with the top surface of the source electrode; and a second electrode in contact with the top surface of the drain electrode. The second insulator includes a first opening portion overlapping with the source electrode and a second opening portion overlapping with the drain electrode. The third insulator is in contact with the side surface of the second insulator and the top surface of the first insulator inside the first opening portion and the second opening portion. The first electrode is positioned through the first opening portion. The second electrode is positioned through the second opening portion.
    Type: Application
    Filed: December 14, 2020
    Publication date: February 2, 2023
    Inventors: Ryota HODO, Katsuaki TOCHIBAYASHI, Toshiya ENDO, Shunpei YAMAZAKI
  • Patent number: 11545551
    Abstract: A semiconductor device in which variations in characteristics, deterioration of elements, and abnormality in shape are inhibited is provided. The semiconductor device includes a first region including a plurality of elements and a second region including a plurality of dummy elements. The second region is provided in an outer edge of the first region, and the element and the dummy element each include an oxide semiconductor. The element and the dummy element have the same structure, and a structure body included in the element and a structure body included in the dummy element are formed with the same material and provided in the same layer. The oxide semiconductor includes In, an element M (M is Al, Ga, Y, or Sn), and Zn.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: January 3, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinya Sasagawa, Erika Takahashi, Katsuaki Tochibayashi, Ryo Arasawa
  • Patent number: 11527657
    Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, a first insulator over the third oxide, a conductor over the first insulator, a second insulator in contact with the second oxide and the third oxide, and a third insulator over the second insulator; the second oxide includes first region to fifth regions; the resistance of the first region and the resistance of the second region are lower than the resistance of the third region; the resistance of the fourth region and the resistance of the fifth region are lower than the resistance of the third region and higher than the resistance of the first region and the resistance of the second region; and the conductor is provided over the third region, the fourth region, and the fifth region to overlap with the third region, the fourth region, and the fifth region.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: December 13, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuki Hata, Katsuaki Tochibayashi, Junpei Sugao, Shunpei Yamazaki
  • Patent number: 11515426
    Abstract: A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: November 29, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Toshinari Sasaki, Katsuaki Tochibayashi, Shunpei Yamazaki
  • Patent number: 11495690
    Abstract: A semiconductor device having high on-state current and high reliability is provided. The semiconductor device includes, a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor and a second conductor over the second oxide; a third oxide over the second oxide; a second insulator over the third oxide; a third conductor located over the second insulator and overlapping with the third oxide; a third insulator in contact with a top surface of the first insulator, a side surface of the first oxide, a side surface of the second oxide, a side surface of the first conductor, a top surface of the first conductor, a side surface of the second conductor, and a top surface of the second conductor; a fourth insulator over the third insulator; a fifth insulator over the fourth insulator; and a sixth insulator over the third conductor, the second insulator, the third oxide and the fifth insulator.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo
  • Publication number: 20220271169
    Abstract: A semiconductor device having a high on-state current is provided. The semiconductor device includes a first oxide; a first conductor and a second conductor provided over the first oxide to be separated from each other; and a second oxide provided over the first oxide and between the first conductor and the second conductor. Each of the first oxide and the second oxide has crystallinity, the first oxide includes a region where a c-axis is aligned substantially perpendicularly to a top surface of the first oxide, and the second oxide includes a region where the c-axis is aligned substantially perpendicularly to the top surface of the first oxide, a region where the c-axis is aligned substantially perpendicularly to a side surface of the first conductor, and a region where the c-axis is aligned substantially perpendicularly to a side surface of the second conductor.
    Type: Application
    Filed: February 9, 2022
    Publication date: August 25, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Katsuaki TOCHIBAYASHI, Kentaro SUGAYA
  • Publication number: 20220271168
    Abstract: A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor, a first conductor and a second conductor over the oxide semiconductor, a first insulator in contact with a top surface of the first conductor, a second insulator in contact with a top surface of the second conductor, a third insulator which is positioned over the first insulator and the second insulator and has an opening overlapping with a region between the first conductor and the second conductor, a fourth insulator positioned over the oxide semiconductor and in the region between the first conductor and the second conductor, and a third conductor over the fourth insulator. Each of the first insulator and the second insulator is a metal oxide including an amorphous structure.
    Type: Application
    Filed: July 13, 2020
    Publication date: August 25, 2022
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Ryota HODO, Takashi HIROSE, Yoshihiro KOMATSU, Katsuaki TOCHIBAYASHI, Kentaro SUGAYA
  • Publication number: 20220246765
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Inventors: Shunpei YAMAZAKI, Katsuaki TOCHIBAYASHI, Ryota HODO, Kentaro SUGAYA, Naoto YAMADE
  • Publication number: 20220199613
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a first conductor and a second insulator over a first insulator; a third insulator over the first conductor and the second insulator; a fourth insulator over the third insulator; a first oxide over the fourth insulator; a second oxide and a third oxide over the first oxide; a second conductor in contact with a top surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the second oxide, and a top surface of the second oxide; a third conductor in contact with the top surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the third oxide, and a top surface of the third oxide; a fourth oxide over the first oxide; a fifth insulator over the fourth oxide; and a fourth conductor over the fifth insulator.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Katsuaki TOCHIBAYASHI
  • Publication number: 20220199832
    Abstract: A semiconductor device with small variations in transistor characteristics is provided. The semiconductor device includes an oxide; a first conductor and a second conductor provided apart from each other over the oxide; an insulator in a region between the first conductor and the second conductor over the oxide; and a conductor over the insulator. A side surface of the oxide, a top surface of the first conductor, a side surface of the first conductor, a top surface of the second conductor, and a side surface of the second conductor include regions in contact with a nitride containing silicon.
    Type: Application
    Filed: May 12, 2020
    Publication date: June 23, 2022
    Inventors: Shunpei YAMAZAKI, Ryota HODO, Katsuaki TOCHIBAYASHI, Hiroaki HONDA, Kentaro SUGAYA
  • Patent number: 11316051
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: April 26, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo, Kentaro Sugaya, Naoto Yamade
  • Publication number: 20220123150
    Abstract: It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device having a stacked-layer structure of a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer is provided, in which the nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower and the source electrode and the drain electrode include one or more of tungsten, platinum, and molybdenum.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Takuya HIROHASHI, Katsuaki TOCHIBAYASHI, Yasutaka NAKAZAWA, Masatoshi YOKOYAMA