Patents by Inventor Katsuhide Natori

Katsuhide Natori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5585683
    Abstract: An electrostatic actuator comprising:a first member (1) having a plurality of belt-like electrodes (4) insulated from one another and disposed in a predetermined direction with predetermined gaps between them;a second member (10) constituted by a resistance body on the opposed surface thereof coming into contact with the surface of the first member (1); andcontrol means (11) capable of changing an impressed voltage to be applied to each of a plurality of belt-like electrodes disposed on the first member;the control means (11) being constituted so as to move the first and second members relative to each other by applying a predetermined voltage pattern consisting of a pulse voltage to the belt-like electrodes.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: December 17, 1996
    Assignees: Fujitsu Limited, Toshiro Higuchi
    Inventors: Toshiro Higuchi, Saku Egawa, Masao Hiyane, Katsuhide Natori
  • Patent number: 5534740
    Abstract: An electrostatic actuator incorporates a sensor for detecting both position and the state of distribution of charges and is efficiently driven in high-speed operation. A first member has a plurality of driving electrodes thereon, each having the shape of a strip, a second member is placed in contact with the first member, and a control means is provided for changing the voltages applied to the driving electrodes to produce relative movement of the first member and the second member. Detecting electrodes are arranged on the first member at predetermined phases, independently of the driving electrodes, and a detecting unit detects the position of the second member and the state of charges induced on the second member, through the detection of electric signals induced in the detecting electrodes by the charges distributed on the second member.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: July 9, 1996
    Assignees: Fujitsu Limited, Toshiro Higuchi
    Inventors: Toshiro Higuchi, Saku Egawa, Toshiki Niino, Katsuhide Natori, Fumio Tabata
  • Patent number: 5378954
    Abstract: An electrostatic actuator comprising:a first member (1) having a plurality of belt-like electrodes (4) insulated from one another and disposed in a predetermined direction with predetermined gaps between them;a second member (10) constituted by a resistance body on the opposed surface thereof coming into contact with the surface of the first member (1); andcontrol means (11) capable of changing an impressed voltage to be applied to each of a plurality of belt-like electrodes disposed on the first member;the control means (11) being constituted so as to move the first and second members relative to each other by applying a predetermined voltage pattern consisting of a pulse voltage to the belt-like electrodes.
    Type: Grant
    Filed: February 6, 1992
    Date of Patent: January 3, 1995
    Assignee: Fujitsu Limited
    Inventors: Toshiro Higuchi, Saku Egawa, Masao Hiyane, Katsuhide Natori
  • Patent number: 5362359
    Abstract: A circuit board comprising a core material made from magnesium, a magnesium alloy, or a magnesium-based composite material, and an electric circuit formed on the core material. A process for producing the circuit board comprises the steps of (1) forming an electrodeposition-painted coating on such a core material, (2) forming a polyimide resin coating on the electrodeposition-painted coating, (3) forming a via hole extending through the resin coating to the underlying electrodeposition-painted coating, (4) etching and removing the electrodeposition-painted coating in the region exposed in the bottom of the via hole while masking the other region with the resin coating thereby extending the via hole to the core material, (5) forming a metal film on at least a free surface of the resin coating and an inner surface of the extended via hole, and (6) etching the metal film by using a photoresist mask to form a conductor layer having a predetermined pattern.
    Type: Grant
    Filed: May 10, 1993
    Date of Patent: November 8, 1994
    Assignee: Fujitsu Limited
    Inventors: Eiji Horikoshi, Motoaki Tani, Isao Watanabe, Katsuhide Natori, Takehiko Sato
  • Patent number: 5236772
    Abstract: A circuit board comprising: a core material made from magnesium, a magnesium alloy, or a magnesium-based composite material, and an electric circuit formed on the core material. A process for producing the circuit board comprises the steps of (1) forming an electrodeposition-painted coating on such a core material, (2) forming a polyimide resin coating on the electrodeposition-painted coating, (3) forming a via hole extending through the resin coating to the underlying electrodeposition-painted coating, (4) etching and removing the electrodeposition-painted coating in the region exposed in the bottom of the via hole while masking the other region with the resin coating thereby extending the via hole to the core material, (5) forming a metal film on at least a free surface of the resin coating and an inner surface of the extended via hole, and (6) etching the metal film by using a photoresist mask to form a conductor layer having a predetermined pattern.
    Type: Grant
    Filed: September 18, 1991
    Date of Patent: August 17, 1993
    Assignee: Fujitsu Limited
    Inventors: Eiji Horikoshi, Motoaki Tani, Isao Watanabe, Katsuhide Natori, Takehiko Sato
  • Patent number: 5024264
    Abstract: A method of cooling a device with a cooling unit, using a metal sherbet, which is metal being in a state of a two-phase composition consisting of a liquid phase and a solid phase, as a heat conducting body put between the cooling unit and the heat generating device for transferring heat generated in the device to the cooling unit. The metal sherbet is metal, such as an In-Ga binary system, in which solids of an In-Ga solid solution are dispersed in an In and Ga liquid at a temperature obtained under normal operations of the device and the cooling unit.
    Type: Grant
    Filed: May 8, 1989
    Date of Patent: June 18, 1991
    Assignee: Fujitsu Limited
    Inventors: Katsuhide Natori, Isao Watanabe, Koji Katsuyama, Isao Kawamura, Karuhiko Yamamoto, Takeshi Nagai
  • Patent number: 5012858
    Abstract: A method of cooling a semiconductor device with a cooling unit, using a metal sherbet, which is metal being in a state of a mixed phase consisting of a liquid phase and a solid phase, as a heat conducting body put between the cooling unit and the semiconductor device for transferring heat generated in the semiconductor device to the cooling unit. The metal sherbet is metal, such as In-Ga binary system, in which solids of In-Ga solid solution are dispersed in an In and Ga liquid at a temperature obtained under normal operations of the semiconductor device and the cooling unit.
    Type: Grant
    Filed: April 10, 1989
    Date of Patent: May 7, 1991
    Assignee: Fujitsu Limited
    Inventors: Katsuhide Natori, Isao Watanabe, Koji Katsuyama, Isao Kawamura, Haruhiko Yamamoto, Takeshi Nagai
  • Patent number: 4760240
    Abstract: A process for laser welding a cover and a casing, each made of aluminum or an aluminum-based alloy, via a nickel layer plated thereon, thereby forming a package for electronic devices, the process comprising the steps of: boring holes in sides of the casing, thereby providing holes through which input/output and source terminals can be inserted and be soldered hermetically to the casing; plating a nickel layer on the surface of the casing; mounting electronic devices in the casing and forming necessary connections between the devices and the terminals; and, welding the cover and the casing together by pulsed YAG laser beam, thereby forming a weld zone containing 1.5 to 10.0% of nickel by weight, and sealing the cover and the casing hermetically.
    Type: Grant
    Filed: February 9, 1987
    Date of Patent: July 26, 1988
    Assignee: Fujitsu Limited
    Inventors: Tsutomu Iikawa, Takeaki Sakai, Isao Kawamura, Katsuhide Natori, Takeshi Nagai, Shigeki Okamoto