Patents by Inventor Katsuhiko MINOTANI

Katsuhiko MINOTANI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for testing a memory
    Patent number: 9043663
    Abstract: An apparatus is equipped with a storage device including an error correction circuit. The apparatus performs a test of the storage device according to a predetermined testing procedure, and records a time-point at which error correction of the storage device has been performed by the error correction circuit during performance of the test. The apparatus determines, with predetermined accuracy, a first position within the storage device on which the error correction has been performed, based on a test speed at which the test is performed, a time-period from the time-point to current time, and a second position within the storage device on which the test is being performed at the current time. Then, the apparatus performs the test predetermined times on a range included in the storage device and including the first position, according to a testing procedure that has been used at the time-point.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: May 26, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Katsuhiko Minotani, Takahiro Osada, Hirokazu Ohta
  • APPARATUS AND METHOD FOR TESTING A MEMORY
    Publication number: 20130332784
    Abstract: An apparatus is equipped with a storage device including an error correction circuit. The apparatus performs a test of the storage device according to a predetermined testing procedure, and records a time-point at which error correction of the storage device has been performed by the error correction circuit during performance of the test. The apparatus determines, with predetermined accuracy, a first position within the storage device on which the error correction has been performed, based on a test speed at which the test is performed, a time-period from the time-point to current time, and a second position within the storage device on which the test is being performed at the current time. Then, the apparatus performs the test predetermined times on a range included in the storage device and including the first position, according to a testing procedure that has been used at the time-point.
    Type: Application
    Filed: June 4, 2013
    Publication date: December 12, 2013
    Inventors: Katsuhiko MINOTANI, Takahiro Osada, Hirokazu Ohta