Abstract: An Ethernet® communication system wherein control signals are relayed by ADM/WDM apparatuses and are directly transferred between L2/L3 switches apparatuses to enable application for new control protocols, improvement of the maintenance ability, etc., that is, an Ethernet® communication system provided with at least two transmission apparatuses arranged opposing each other across a transmission line at which an Ethernet® path is set and terminating units connected to the transmission apparatuses and communicating between terminating units through said transmission apparatuses, wherein each of the transmission apparatuses is provided with a relaying means for relaying communications by insertion of control signals transferred by interfaces of the terminating units, without termination at the transmission apparatus, into Ethernet® frames between the transmission apparatuses, and the control signals are passed through the relaying means to the opposing side terminating unit.

Abstract: A packet multiplexing control method and equipment using the method are realized by a simple control method with reduced hardware, enabling to provide low cost, efficient and fair bandwidth control corresponding to traffic characteristic of users. The packet multiplexing control method includes the steps of extracting a header part in each packet data received from a plurality of terminals; learning an address in the extracted header part; and controlling either admission processing or discard processing of the received packet according to the result of learning the address.

Abstract: A packet multiplexing control method and equipment using the method are realized by a simple control method with reduced hardware, enabling to provide low cost, efficient and fair bandwidth control corresponding to traffic characteristic of users. The packet multiplexing control method includes the steps of extracting a header part in each packet data received from a plurality of terminals; learning an address in the extracted header part; and controlling either admission processing or discard processing of the received packet according to the result of learning the address.

Abstract: A time switch control system having a cross-connect function is used for digital time-division. Multiplex communications permit desired channel settings and reduce power consumption. Identifying circuits identify which time-slot signals are to be retained by an input signal retaining memory, and output identification information to the retention memory, and to a retention memory controller. The retention memory controller stores therein the identification information from the identifying circuits, then reads out the identification information, and controls the input signal retaining memory in accordance with the contents of the identification information. Only the specified time-slot signals are stored and retained by the input signal retaining memory, thereby reducing power requirements. Exchange/output circuits exchange the time-slot signals stored in the input signal retaining memory in accordance with channel setting information, and output the exchanged signals.