Abstract: Provided is a microchip capable of integrating liquid evaporation as an operation on the microchip. In the microchip 10 having a gas flow path 13 inside, liquid is dispersed by capillary action and pooled in a pool portion 12 at a bottom of the gas flow path 13, and at least a part of the liquid pooled in the pool portion 12 is evaporated. As the capillary action is used, the liquid can be dispersed and pooled in the pool portion 12 at the bottom of the gas flow path 13 inside the microchip 10. Besides, the liquid pooled in the pool portion 12 remains in the pool portion by a surface tension even if gas is made to flow in the gas flow path 13 or the gas flow path is evacuated for evaporation. This enables highly efficient evaporation inside the microchip 10.

Abstract: Provided is a microchip capable of integrating liquid evaporation as an operation on the microchip. In the microchip 10 having a gas flow path 13 inside, liquid is dispersed by capillary action and pooled in a pool portion 12 at a bottom of the gas flow path 13, and at least a part of the liquid pooled in the pool portion 12 is evaporated. As the capillary action is used, the liquid can be dispersed and pooled in the pool portion 12 at the bottom of the gas flow path 13 inside the microchip 10. Besides, the liquid pooled in the pool portion 12 remains in the pool portion by a surface tension even if gas is made to flow in the gas flow path 13 or the gas flow path is evacuated for evaporation. This enables highly efficient evaporation inside the microchip 10.

Abstract: An FDG synthesizer, which comprises: a labeling reaction resin column comprising a column filled with a polymer-supported phase-transfer catalyst resin for trapping an ?.sup.18 F! fluoride ion contained in a target water, and performing a labeling reaction between the thus trapped ?.sup.18 F! fluoride ion and triflate, on the one hand, and a hydrolysis reaction vessel for receiving a reaction intermediate product obtained from the labeling reaction, and performing a hydrolysis reaction by adding a strong acidic aqueous solution or a strong alkaline aqueous solution thereto, on the other hand. The above-mentioned hydrolysis reaction vessel may be replaced with a cation-exchange resin column having a heating device and a flow rate control device of the reaction intermediate product.

Abstract: Interlaced image signals are converted into non-interlaced image signals and the scanning lines are also thinned out (i.e., the number of lines is reduced). Line memories L1-L5 are provided in a number (5) Corresponding to the number of horizontal scanning lines thinned out by a predetermined number of lines every number of lines determined from the total number of horizontal scanning lines of the PAL signal and that of the NTSC signal. A demultiplexer 12 selects the memories L1-L5 so that each PAL signal corresponding each of first to fifth ones of six horizontal scanning lines is stored. A selector 14 sequentially read the memories L1-L5 twice during an interval from the time when the PAL signal corresponding to the first horizontal scanning line is stored to the time from storing the PAL signal corresponding to the first horizontal scanning line but before storing the PAL signal corresponding to the seventh horizontal scanning line.

Abstract: Disclosed is an EEPROM cell which can be manufactured with ease by the standard CMOS process. The EEPROM cell of the present invention has a first MOS transistor formed in a semiconductor substrate of a first conductivity type and having current conducting regions of a second conductivity type and a gate electrode, a well of a second conductivity type provided in the substrate, a plate electrode formed on the well with an insulating layer interposed therebetween, and at least one region of the first conductivity type formed in the well adjacent to the plate electrode. The gate electrode and the plate electrode are connected in common and act as a floating gate, and the well acts as a control gate.