Patents by Inventor Katsuhiko Shirasawa

Katsuhiko Shirasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240056028
    Abstract: A method of measuring light and elevated temperature induced degradation includes a first step of injecting carriers into p-type crystalline silicon and maintaining the p-type crystalline silicon at 50° C. or higher and 150° C. or lower until the p-type crystalline silicon has reached a regenerated state, measuring a first degradation amount of the p-type crystalline silicon in the first step, performing a heat treatment on the p-type crystalline silicon at higher than 150° C. and 250° C. or lower, a second step of injecting carriers into the p-type crystalline silicon and maintaining the p-type crystalline silicon at 50° C. or higher and 150° C. or lower until the p-type crystalline silicon has reached a regenerated state, measuring a second degradation amount of the p-type crystalline silicon in the second step, and calculating a light and elevated temperature induced degradation amount of the p-type crystalline silicon based on the first and second degradation amounts.
    Type: Application
    Filed: February 25, 2022
    Publication date: February 15, 2024
    Inventors: Yuji INO, Katsuhiko SHIRASAWA, Hidetaka TAKATO, Shunsuke HEITO, Koichiro NIIRA, Norikazu ITO
  • Publication number: 20220190782
    Abstract: An apparatus for predicting useful life of a photovoltaic module includes an input and an output. The input receives first information indicating an amount of hygrothermal stress that a photovoltaic module undergoes from a start until an end of a period during which the photovoltaic module outputs predetermined electric power. The input further receives second information indicating an amount of hygrothermal stress that the photovoltaic module undergoes per a predetermined time in a field where the photovoltaic module is deployed. The second information is generated based on information about daily maximum temperatures of the photovoltaic module in the field where the photovoltaic module is deployed. The output outputs result information about a predicted period during which the photovoltaic module is expected to output the predetermined electric power when the photovoltaic module is deployed in the field.
    Type: Application
    Filed: March 6, 2020
    Publication date: June 16, 2022
    Inventors: Koichiro NIIRA, Shinsuke UCHIDA, Takuya KUROSE, Shinji YADA, Kyosuke FUJIWARA, Hidetaka TAKATO, Katsuhiko SHIRASAWA, Yuji INO
  • Patent number: 9759656
    Abstract: The inspection apparatus includes: a stage that retains the inspection sample; a light irradiator that irradiates the inspection sample with light having a predetermined wavelength to cause the inspection sample to emit a terahertz wave; a detector that detects electric field intensity of the terahertz wave emitted from the inspection sample; and a comparator that compares the electric field intensity of the terahertz wave emitted from the inspection sample to an evaluation reference value. The evaluation reference value is a value (for example, 90% of a saturation value) smaller than an absolute value of the saturation value of the electric field intensity of the terahertz wave, the terahertz wave being generated by irradiating a reference sample, which is a reference of the inspection sample, with the light while different voltages are applied to the reference sample.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: September 12, 2017
    Assignees: SCREEN HOLDINGS CO., LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Akira Ito, Hidetoshi Nakanishi, Toshimitsu Mochizuki, Hidetaka Takato, Katsuhiko Shirasawa
  • Publication number: 20170234792
    Abstract: The inspection apparatus includes: a stage that retains the inspection sample; a light irradiator that irradiates the inspection sample with light having a predetermined wavelength to cause the inspection sample to emit a terahertz wave; a detector that detects electric field intensity of the terahertz wave emitted from the inspection sample; and a comparator that compares the electric field intensity of the terahertz wave emitted from the inspection sample to an evaluation reference value. The evaluation reference value is a value (for example, 90% of a saturation value) smaller than an absolute value of the saturation value of the electric field intensity of the terahertz wave, the terahertz wave being generated by irradiating a reference sample, which is a reference of the inspection sample, with the light while different voltages are applied to the reference sample.
    Type: Application
    Filed: February 9, 2017
    Publication date: August 17, 2017
    Inventors: Akira ITO, Hidetoshi Nakanishi, Toshimitsu Mochizuki, Hidetaka Takato, Katsuhiko Shirasawa
  • Publication number: 20130032201
    Abstract: [Problem] In the case of further stacking a window layer or the like on a buffer layer, the buffer layer and the light absorption layer are likely to be damaged during the formation of the window layer due to inferior moisture resistance and plasma resistance, and photoelectric conversion elements sometimes fail to achieve any satisfactory conversion efficiency in terms of reliability. [Solving Means] Provided is a photoelectric conversion element including: a light absorption layer containing a I-B group element, a III-B group element, and a VI-B group element, which is provided on a lower electrode layer; a first semiconductor layer containing a III-B group element and a VI-B group element, which is provided on the light absorption layer; and a second semiconductor layer containing an oxide of a II-B group element, which is provided on the first semiconductor layer, wherein the light absorption layer comprises a doped layer region containing the II-B group element, on the first semiconductor layer side.
    Type: Application
    Filed: April 27, 2011
    Publication date: February 7, 2013
    Applicant: KYOCERA CORPORATION
    Inventors: Satoshi Oomae, Shinichi Abe, Masato Fukudome, Takeshi Ookuma, Katsuhiko Shirasawa, Takehiro Nishimura, Daisuke Toyota, Hirotaka Sano, Keita Kurosu
  • Patent number: 7556740
    Abstract: A substrate processing apparatus that roughens the surface of a substrate through a dry etching method by covering the surface of the substrate to be processed with a plate provided with a number of opening portions. The plate is provided with the opening portions in such a manner that an open area ratio of the opening portions on the peripheral side is smaller than an open area ratio of the opening portions in the central portion when the plate is viewed in a plane. It is thus possible to form textures on the surface of the substrate efficiently and homogenously, which in turn makes it possible to manufacture highly efficient solar cells or the like at a low cost.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: July 7, 2009
    Assignee: Kyocera Corporation
    Inventors: Yosuke Inomata, Katsuhiko Shirasawa
  • Publication number: 20070095387
    Abstract: The largest stress is created in the vicinity of the boundary between an edge of a bus bar electrode in a solar cell and a surface of a semiconductor substrate, and stress are easily concentrated. Accordingly, defects such as micro cracks occur in the semiconductor substrate, which develop into a large craze with the defects as its starting point. In connecting bus bar electrodes 4a and 5a in the solar cell by an inner lead 8, therefore, a solder 6 is not brought into contact with edges along the longitudinal direction if the bus bar electrodes 4a and 5a and portions F from the edges to a predetermined distance a inward therefrom, and is brought into direct contact with a filler 10.
    Type: Application
    Filed: November 26, 2004
    Publication date: May 3, 2007
    Inventors: Shuichi Fujii, Toshihiko Kaneko, Takashi Tsuge, Katsuhiko Shirasawa
  • Publication number: 20040040932
    Abstract: A substrate processing apparatus that roughens the surface of a substrate through a dry etching method by covering the surface of the substrate to be processed with a plate provided with a number of opening portions. The plate is provided with the opening portions in such a manner that an open area ratio of the opening portions on the peripheral side is smaller than an open area ratio of the opening portions in the central portion when the plate is viewed in a plane. It is thus possible to form textures on the surface of the substrate efficiently and homogenously, which in turn makes it possible to manufacture highly efficient solar cells or the like at a low cost.
    Type: Application
    Filed: August 26, 2003
    Publication date: March 4, 2004
    Applicant: KYOCERA CORPORATION
    Inventors: Yosuke Inomata, Katsuhiko Shirasawa
  • Patent number: 4640001
    Abstract: Solar cell manufacturing method in which a silicon wafer is coated with an antireflection coating of silicon nitride by means of plasma CVD deposition with the silicon wafer kept at a temperature between 250.degree. C. and 600.degree. C. The coating of silicon nitride at such a high temperature results in a decrease in the recombination speed of the minority carriers produced in the silicon wafer during time of light incidence. The conversion efficiency is thus increased to a value ranging from 11.04% to 12.56%.
    Type: Grant
    Filed: December 20, 1984
    Date of Patent: February 3, 1987
    Assignee: Japan Solar Energy Co., Ltd.
    Inventors: Sakae Koiwai, Keizo Asaoka, Katsuhiko Shirasawa, Hiroyuki Watanabe, Junichi Honda