Abstract: A first semiconductor chip 102 includes an integrated circuit formed on a face which is shown upwards in FIG. 2. A second semiconductor chip 103 includes an integrated circuit formed on a face which is shown downwards in FIG. 2. Between the first semiconductor chip 102 and the second semiconductor chip 103, a non-conductive die pad 107 is interposed. The die pad 107 is provided with connection members 110 protruding from the first semiconductor chip 102 and the second semiconductor chip 103. The connection members 110 are plated on their surfaces so as to be electrically conductive. The integrated circuit on the first semiconductor chip 102 and the integrated circuit on the second semiconductor chip 103 are interconnected by two inter-chip connection wires 104a and 104b, via the connection members 110.

Abstract: A semiconductor apparatus includes serially-connected bodies composed of a switch element and a resistance element respectively interposed between terminals adjacent to one another, conduction-test terminals connected to one and another ends of a series of the serially-connected bodies, and a switch control terminal for collectively controlling all the plural switch elements. Also included are switch elements interposed alternately on the first semiconductor chip side and the second semiconductor chip side between wires adjacent to one another, conduction-test terminals connected to one and another ends of a series of the serially-connected switch elements, and a switch control terminal for collectively controlling all the plural switch elements.

Abstract: A first semiconductor chip 102 includes an integrated circuit formed on a face which is shown upwards in FIG. 2. A second semiconductor chip 103 includes an integrated circuit formed on a face which is shown downwards in FIG. 2. Between the first semiconductor chip 102 and the second semiconductor chip 103, a non-conductive die pad 107 is interposed. The die pad 107 is provided with connection members 110 protruding from the first semiconductor chip 102 and the second semiconductor chip 103. The connection members 110 are plated on their surfaces so as to be electrically conductive. The integrated circuit on the first semiconductor chip 102 and the integrated circuit on the second semiconductor chip 103 are interconnected by two inter-chip connection wires 104a and 104b, via the connection members 110.

Abstract: A semiconductor apparatus comprises serially-connected bodies comprised of a switch element and a resistance element respectively interposed between terminals adjacent to one another, conduction-test terminals connected to one and another ends of a series of the serially-connected bodies, and a switch control terminal for collectively controlling all the plural switch elements. Also comprised are switch elements interposed alternately on the first semiconductor chip side and the second semiconductor chip side between wires adjacent to one another, conduction-test terminals connected to one and another ends of a series of the serially-connected switch elements, and a switch control terminal for collectively controlling all the plural switch elements.