Patents by Inventor Katsuhiro Hirayama

Katsuhiro Hirayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12330240
    Abstract: Provided are a housing and a handling method for a processing device that can prevent the adherence of dust particles and the like on a sensor. A housing accommodates a sensor that detects an energy beam. The housing comprises: a chamber provided with a transparent member through which the energy beam can pass; and a supply port for supplying gas into the chamber. The sensor detects an energy beam incident thereon via the transparent member.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: June 17, 2025
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Taisei Wakisaka, Yoshinao Shigehara, Katsuhiro Hirayama, Yukio Shiono
  • Publication number: 20250164323
    Abstract: To provide an internal temperature measurement device being manufactured at low costs, an internal temperature measurement method and a program. A deep body thermometer (100) comprises a measurement part (1) and a controller part (6). The measurement part (1) comprises a thermo-electric element (112) for measuring a heat flux amount HF from the internal position of subject as a subject to be measured and a temperature sensor (111) for measuring temperature T of a face of the thermo-electric element 112) at a side of the subject to be measured. The measurement part (1) outputs a heat flux amount HF1 measured by the thermo-electric element (112), a temperature T1 measured by the temperature sensor (111) at the heat flux amount HF1, a heat flux amount HF2 different from the heat flux amount HF1 measured by the thermo-electric element (112) and a temperature T2 measured by the temperature sensor (111) at the heat flux amount HF2.
    Type: Application
    Filed: February 22, 2022
    Publication date: May 22, 2025
    Applicant: BIODATA BANK, INC.
    Inventors: Yuya KODERA, Takahiro SHIOTSU, Katsuhiro HIRAYAMA
  • Publication number: 20220226936
    Abstract: Provided are a housing and a handling method for a processing device that can prevent the adherence of dust particles and the like on a sensor. A housing accommodates a sensor that detects an energy beam. The housing comprises: a chamber provided with a transparent member through which the energy beam can pass; and a supply port for supplying gas into the chamber. The sensor detects an energy beam incident thereon via the transparent member.
    Type: Application
    Filed: June 2, 2020
    Publication date: July 21, 2022
    Inventors: Taisei Wakisaka, Yoshinao Shigehara, Katsuhiro Hirayama, Yukio Shiono
  • Patent number: 8307143
    Abstract: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: November 6, 2012
    Assignee: d-broad, Inc.
    Inventors: Katsuhiro Hirayama, Hiroto Yoshikawa, Yoshihiro Ueda, Osamu Mikami
  • Publication number: 20110238880
    Abstract: There is provided an interface card system for SD bus control. The interface card system for SD bus control includes a CPU bus interface 11a and/or an SD bus interface 11b, a host interface module 16 connected to the interfaces which interprets an SD command and controls operation of the whole of the interface card system, first and second internal SD host engines 15a and 15b which function as a host controller, first and second selectors 14a and 14b respectively connected to the internal SD host engines which each select a path for data or a command, first and second SD bus interfaces 13a and 13b respectively connected to the selectors, and a data pass-through control section 17 connected to the SD bus interfaces connected to the selectors which allows an SD command and data to pass through.
    Type: Application
    Filed: April 30, 2010
    Publication date: September 29, 2011
    Applicant: D-BROAD, INC.
    Inventors: Katsuhiro Hirayama, Hiroto Yoshikawa, Yoshihiro Ueda, Osamu Mikami
  • Patent number: 7225357
    Abstract: An SDIO card development supporting system for development of SDIO cards, an SDIO controller reference board, and a method for running the system are disclosed. The SDIO card development supporting system includes: (a) a hardware component comprising: (i) a platform equipped with an operating system and a memory operably connected to the operating system; (ii) an SD host board including an SDIO host device; and (iii) an SD bus operably connecting the operating system of the platform to the SD host board; and (b) a software component stored in the memory of the platform, wherein the software component comprises an SDIO test program that runs on the operating system of the platform.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: May 29, 2007
    Assignee: Zentek Technology Japan, Inc.
    Inventors: Ping Huei Tai, Katsuhiro Hirayama
  • Publication number: 20040202015
    Abstract: An SDIO card development supporting system for development of SDIO cards, an SDIO controller reference board, and a method for running the system are disclosed. The SDIO card development supporting system includes: (a) a hardware component comprising: (i) a platform equipped with an operating system and a memory operably connected to the operating system; (ii) an SD host board including an SDIO host device; and (iii) an SD bus operably connecting the operating system of the platform to the SD host board; and (b) a software component stored in the memory of the platform, wherein the software component comprises an SDIO test program that runs on the operating system of the platform.
    Type: Application
    Filed: January 20, 2004
    Publication date: October 14, 2004
    Applicant: C-Guys, Inc.
    Inventors: Ping Huei Tai, Katsuhiro Hirayama
  • Patent number: 5974578
    Abstract: In a mixed signal integrated circuit containing both an analog core circuit and a digital core circuit, a plurality of dedicated analog boundary scan cells disposed around the analog core circuit are connected in series by a dedicated analog boundary scan path. A plurality of dedicated digital boundary scan cells disposed around a digital core circuit are connected in series by a dedicated digital boundary scan path. The analog and digital boundary scan paths are independent of each other. In testing the analog or digital core circuit, the boundary scan path dedicated thereto is selected so that sets of test control data or test data are shifted only in the boundary scan cells dedicated thereto. As a consequence, a test pattern is shortened and the analog or digital core circuit can efficiently be tested in a shorter period of time.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: October 26, 1999
    Assignee: Matsushita Electronics Corporation
    Inventors: Takashi Mizokawa, Katsuhiro Hirayama