Abstract: A method comprising, by a processing unit and a memory: obtaining a training set of data; dividing sets of data into a plurality of groups, wherein all sets of data for which feature values meet at least one similarity criterion, are in the same group, storing in a reduced training set of data, for each group, at least one aggregated set of data, wherein, for a plurality of the groups, a number of aggregated sets of data is less than a number of the sets of data of the group, wherein the reduced training set of data is suitable to be used in a classification algorithm for determining a relationship between the at least one label and the features of the electronic items, thereby reducing computation complexity when processing the reduced training set of data, compared to processing the training set of data.

Abstract: To detect deterioration of a correction memory, provided is a semiconductor device including the correction memory that stores therein correction data for correcting a correction target; a correcting section that corrects a detection value of a sensor element, using correction data read from the correction memory; a diagnosing section that diagnoses the correction memory, using the correction data read from the correction memory; and a control section that controls reading conditions used when reading the correction data from the correction memory, wherein the control section causes a first reading condition, used when reading the correction data for correcting a correction target, to differ from a second reading condition, which is used when reading the correction data for the diagnosis.

Abstract: A method for predicting characteristics of semiconductor devices includes collecting first data for a plurality of first characteristics from first semiconductor devices already in mass production, and collecting second data for the first characteristics and third data for a plurality of second characteristics from at least one second semiconductor device manufactured as an experimental sample before beginning the mass production. A covariance matrix is then obtained based on the first, second, and third data, and a mean vector for third semiconductor devices to be in the mass production is determined. Prediction data for third semiconductor devices is then generated based on the covariance matrix and the mean vector.

Abstract: A method comprising, by a processing unit and a memory: obtaining a training set of data; dividing sets of data into a plurality of groups, wherein all sets of data for which feature values meet at least one similarity criterion, are in the same group, storing in a reduced training set of data, for each group, at least one aggregated set of data, wherein, for a plurality of the groups, a number of aggregated sets of data is less than a number of the sets of data of the group, wherein the reduced training set of data is suitable to be used in a classification algorithm for determining a relationship between the at least one label and the features of the electronic items, thereby reducing computation complexity when processing the reduced training set of data, compared to processing the training set of data.

Abstract: To detect deterioration of a correction memory, provided is a semiconductor device including the correction memory that stores therein correction data for correcting a correction target; a correcting section that corrects a detection value of a sensor element, using correction data read from the correction memory; a diagnosing section that diagnoses the correction memory, using the correction data read from the correction memory; and a control section that controls reading conditions used when reading the correction data from the correction memory, wherein the control section causes a first reading condition, used when reading the correction data for correcting a correction target, to differ from a second reading condition, which is used when reading the correction data for the diagnosis.

Abstract: A protection circuit includes a first PMOS and a first PDMOS receiving input of voltage of a voltage dividing point of voltage input from an external power supply terminal, and a second PMOS and a second PDMOS receiving input of drain output voltage of the first PDMOS. The first PMOS is connected on the external power supply terminal side of the first PDMOS, and the second PMOS is connected on the external power supply terminal side of the second PDMOS. During overvoltage application, the voltage of the voltage dividing point is clamped to the breakdown voltage of a Zener diode, the second PDMOS turns OFF, and supply to an integrated circuit protected from overvoltage is cut off. When the voltage source is connected in reverse, parasitic diodes of the first and second PMOSs are reverse-biased and the flow of current in a path through the parasitic diodes is inhibited.

Abstract: A method for predicting characteristics of semiconductor devices includes collecting first data for a plurality of first characteristics from first semiconductor devices already in mass production, and collecting second data for the first characteristics and third data for a plurality of second characteristics from at least one second semiconductor device manufactured as an experimental sample before beginning the mass production. A covariance matrix is then obtained based on the first, second, and third data, and a mean vector for third semiconductor devices to be in the mass production is determined. Prediction data for third semiconductor devices is then generated based on the covariance matrix and the mean vector.

Abstract: A protection circuit includes a first PMOS and a first PDMOS receiving input of voltage of a voltage dividing point of voltage input from an external power supply terminal, and a second PMOS and a second PDMOS receiving input of drain output voltage of the first PDMOS. The first PMOS is connected on the external power supply terminal side of the first PDMOS, and the second PMOS is connected on the external power supply terminal side of the second PDMOS. During overvoltage application, the voltage of the voltage dividing point is clamped to the breakdown voltage of a Zener diode, the second PDMOS turns OFF, and supply to an integrated circuit protected from overvoltage is cut off. When the voltage source is connected in reverse, parasitic diodes of the first and second PMOSs are reverse-biased and the flow of current in a path through the parasitic diodes is inhibited.

Abstract: In a method of analyzing a semiconductor device, output values of semiconductor devices are measured, population data including the output values in connection with values of design attributes of the semiconductor devices is determined, outlier output values are extracted from among the output values included in the population data to determine discriminated data, and a weak value of a weak design attribute, which causes the outlier output values, is determined based on a difference between a ratio of a number of outlier output values, which are related with respective values of the design attributes, to a total number of the outlier output values included in the discriminated data, and a ratio of a number of output values, which are related with respective values of the design attributes, to a total number of the output values included in the population data.

Abstract: Impurities are introduced into a semiconductor substrate by using a gate electrode formed on the semiconductor substrate through an oxide film as a mask, and low concentration impurity regions are formed. Then, side walls are formed on the gate electrode. Next, after an insulating film is formed on the whole surface of the substrate by a CVD method, impurities are introduced by using the gate electrode and the side walls as a mask, and high concentration impurity regions are formed. Then, a thermal treatment of the substrate is performed, and after the low concentration impurity regions and the high concentration impurity regions are crystallized, an interlayer insulating film is formed.

Abstract: A method of manufacturing a semiconductor device including a MOS transistor, wherein a second resist pattern having openings respectively defining gate, source, and drain regions is formed while leaving a first resist pattern on a gate material film, i.e., a polycrystalline silicon film, which is used to form a gate electrode. Impurities are implanted into the source and drain regions by using the first and second resist patterns as a mask. The impurities are stopped in the inside of the first resist pattern on the gate and are not implanted into the gate.