Patents by Inventor Katsuhisa Sakai
Katsuhisa Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090137114Abstract: A semiconductor device is manufactured by a method including forming a first interlayer insulating film. A first etching stopper film is formed on the first interlayer insulating film. A conductive layer is formed on the first etching stopper film. A second etching stopper film is formed to cover the conductive layer, an upper surface of the conductive layer and both side surfaces of the conductive layer. A second interlayer insulating film is formed on the second etching stopper film. A hole is formed penetrating the second interlayer insulating film in a direction of thickness and reaching the conductive layer. An interconnect is formed in the hole. The step of forming a hole includes etching the second interlayer insulating film under a first etching condition, and etching the second etching stopper film under a second etching condition different from the first etching condition. The second etching condition includes using an etching gas containing C, F, and H.Type: ApplicationFiled: November 19, 2008Publication date: May 28, 2009Applicant: RENESAS TECHNOLOGY CORP.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Patent number: 7465662Abstract: A semiconductor device is manufactured by a method including forming a first interlayer insulating film. A first etching stopper film is formed on the first interlayer insulating film. A conductive layer is formed on the first etching stopper film. A second etching stopper film is formed to cover the conductive layer, an upper surface of the conductive layer and both side surfaces of the conductive layer. A second interlayer insulating film is formed on the second etching stopper film. A hole is formed penetrating the second interlayer insulating film in a direction of thickness and reaching the conductive layer. An interconnect is formed in the hole. The step of forming a hole includes etching the second interlayer insulating film under a first etching condition, and etching the second etching stopper film under a second etching condition different from the first etching condition.Type: GrantFiled: October 12, 2007Date of Patent: December 16, 2008Assignee: Renesas Technology Corp.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Publication number: 20080045006Abstract: An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An interlayer insulating film is formed on the etching stopper film. In a structure above, initially, a hole vertically penetrating the interlayer insulating film for exposing a surface of the etching stopper film is formed under a first etching condition. Thereafter, the etching stopper film serving as a bottom surface of the hole is removed under a second etching condition, thereby forming the hole reaching the conductive layer. An interconnection is embedded in the hole. A semiconductor device in which a hole reaching the conductive layer is prevented from extending as far as the lower interlayer insulating film as a result of misalignment, as well as a manufacturing method thereof are thus obtained.Type: ApplicationFiled: October 12, 2007Publication date: February 21, 2008Applicant: RENESAS TECHNOLOGY CORP.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Patent number: 7301237Abstract: An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An interlayer insulating film is formed on the etching stopper film. In a structure above, initially, a hole vertically penetrating the interlayer insulating film for exposing a surface of the etching stopper film is formed under a first etching condition. Thereafter, the etching stopper film serving as a bottom surface of the hole is removed under a second etching condition, thereby forming the hole reaching the conductive layer. An interconnection is embedded in the hole. A semiconductor device in which a hole reaching the conductive layer is prevented from extending as far as the lower interlayer insulating film as a result of misalignment, as well as a manufacturing method thereof are thus obtained.Type: GrantFiled: September 20, 2005Date of Patent: November 27, 2007Assignee: Renesas Technology Corp.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Publication number: 20060063372Abstract: An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An interlayer insulating film is formed on the etching stopper film. In a structure above, initially, a hole vertically penetrating the interlayer insulating film for exposing a surface of the etching stopper film is formed under a first etching condition. Thereafter, the etching stopper film serving as a bottom surface of the hole is removed under a second etching condition, thereby forming the hole reaching the conductive layer. An interconnection is embedded in the hole. A semiconductor device in which a hole reaching the conductive layer is prevented from extending as far as the lower interlayer insulating film as a result of misalignment, as well as a manufacturing method thereof are thus obtained.Type: ApplicationFiled: September 20, 2005Publication date: March 23, 2006Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Patent number: 6872656Abstract: A semiconductor device includes a first interconnection, an interlayer insulation film covering the first interconnection a contact hole provided in the interlayer insulation film and reaching the first interconnection, a first barrier metal and a tungsten plug provided in the contact hole, an oxide film provided at a surface of the tungsten plug, and a second barrier metal and a second interconnection provided on the oxide film.Type: GrantFiled: June 17, 2003Date of Patent: March 29, 2005Assignee: Renesas Technology Corp.Inventor: Katsuhisa Sakai
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Patent number: 6769960Abstract: An apparatus for manufacturing a semiconductor device by polishing the surface of a semiconductor substrate is provided, which comprises a polishing pad for polishing the substrate surface, a polishing slurry feed apparatus for feeding a polishing slurry to the substrate surface, and a measuring instrument including an electrode (A) and an electrode (B) immersed in a polishing slurry, wherein a characteristic variation of the polishing slurry is detected from a variation in value of an electric current passing between the electrode (A) and the electrode (B) or from a variation in potential difference between the electrodes.Type: GrantFiled: December 4, 2002Date of Patent: August 3, 2004Assignee: Renesas Technology Corp.Inventor: Katsuhisa Sakai
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Publication number: 20040121587Abstract: A semiconductor device includes a first interconnection, an interlayer insulation film covering the first interconnection a contact hole provided in the interlayer insulation film and reaching the first interconnection, a first barrier metal and a tungsten plug provided in the contact hole, an oxide film provided at a surface of the tungsten plug, and a second barrier metal and a second interconnection provided on the oxide film.Type: ApplicationFiled: June 17, 2003Publication date: June 24, 2004Applicant: RENESAS TECHNOLOGY CORP.Inventor: Katsuhisa Sakai
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Publication number: 20030228830Abstract: An apparatus for manufacturing a semiconductor device by polishing the surface of a semiconductor substrate is provided, which comprises a polishing pad for polishing the substrate surface, a polishing slurry feed apparatus for feeding a polishing slurry to the substrate surface, and a measuring instrument including an electrode (A) and an electrode (B) immersed in a polishing slurry, wherein a characteristic variation of the polishing slurry is detected from a variation in value of an electric current passing between the electrode (A) and the electrode (B) or from a variation in potential difference between the electrodes.Type: ApplicationFiled: December 4, 2002Publication date: December 11, 2003Inventor: Katsuhisa Sakai
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Patent number: 6399497Abstract: A tungsten film 20 is formed over a titanium-base film 18 to provide an interconnecting layer 22. An anti-reflection film 26 is formed over the interconnecting layer 22. Further, a photoresist 28 is applied over the anti-reflection film 26, followed by patterning. Using a mixed gas of SF6 and Cl2, the anti-reflection film 26 is etched. With a mixed gas of SF6 and Cl2, the tungsten film 20 is then etched. After that, the titanium-base film 18 is etched using a mixed gas of Cl2 and BCl3.Type: GrantFiled: December 19, 2000Date of Patent: June 4, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Katsuhisa Sakai
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Publication number: 20020009889Abstract: A tungsten film 20 is formed over a titanium-base film 18 to provide an interconnecting layer 22. An anti-reflection film 26 is formed over the interconnecting layer 22. Further, a photoresist 28 is applied over the anti-reflection film 26, followed by patterning. Using a mixed gas of SF6 and Cl2, the anti-reflection film 26 is etched. With a mixed gas of SF6 and Cl2, the tungsten film 20 is then etched. After that, the titanium-base film 18 is etched using a mixed gas of Cl2 and BCl3.Type: ApplicationFiled: December 19, 2000Publication date: January 24, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventor: Katsuhisa Sakai
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Patent number: 5140091Abstract: Disclosed are a composition comprising polyether compounds, obtained by addition copolymerization of a mixture of 4-vinylcyclohexene-1-oxide and a compound having at least two epoxy groups with a compound having at least one active hydrogen atom, and a composition comprising epoxy compounds obtained by epoxidation of the composition of the polyether compounds. The invention also relates to processes for production thereof.The disclosed composition comprising epoxy compounds has a higher softening temperature compared that produced by polymerization of only 4-vinylcyclohexene-1-oxide with a compound having at least one active hydrogen atom.Type: GrantFiled: December 20, 1990Date of Patent: August 18, 1992Assignee: Daicel Chemical Industries Ltd.Inventors: Katsuhisa Sakai, Hiroyuki Oshima
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Patent number: 5122586Abstract: Disclosed are a composition comprising polyether compounds, obtained by addition copolymerization of a mixture of 4-vinylcyclohexene-1-oxide and a compound having at least two epoxy groups with a compound having at least one active hydrogen atom, and a composition comprising epoxy compounds obtained by epoxidation of the composition of the polyether compounds. The invention also relates to processes for production thereof.The disclosed composition comprising epoxy compounds has a higher softening temperature compared that produced by polymerization of only 4-vinylcyclohexene-1-oxide with a compound having at least one active hydrogen atom.Type: GrantFiled: March 3, 1989Date of Patent: June 16, 1992Assignee: Daicel Chemical Industries, Ltd.Inventors: Katsuhisa Sakai, Hiroyuki Oshima
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Patent number: 4841017Abstract: Disclosed as a polyether compound having ether groups and vinyl double bonds represented by formula (I) ##STR1## and an epoxy resin represented by formula (II) ##STR2## wherein R.sup.1 represents a residue group of an organic compound having l active hydrogen atoms, n1 through nl each represents 0 or an integer of from 1 to 100, the sum of integers represented by n1 through nl is from 1 to 100, and l represents an integer of from 1 to 100, and A represents from 1 to 100, and A represents ##STR3## or a mixture of ##STR4## wherein R.sup.2 represents a residue group of mono epoxy compound, and B represents ##STR5## or a mixture of ##STR6## wherein X represents a ##STR7## group, wherein R.sup.3 represents a hydrogen atom, an alkyl group, an alkyl carbonyl group, or an arylcarbonyl group, provided that the epoxy resin represented by formula (II) contains at least one ##STR8## group: In a further aspect, the invention relates to processes for production thereof.Type: GrantFiled: March 11, 1988Date of Patent: June 20, 1989Assignee: Daicel Chemical Industries, Ltd.Inventors: Takaaki Murai, Katsuhisa Sakai