Patents by Inventor Katsuhisa SUGIMORI
Katsuhisa SUGIMORI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11628534Abstract: A silicon wafer single-side polishing method that can significantly improve the stepped minute defect occurrence rate is provided. The silicon wafer single-side polishing method comprises: a first polishing step of performing polishing on one side of a silicon wafer under a first polishing condition; and a second polishing step of performing polishing on the silicon wafer under a second polishing condition in which at least one of an applied pressure and a relative speed in the first polishing condition is changed, after the first polishing step, wherein a polishing rate ratio according to the first polishing condition is higher than a polishing rate ratio according to the second polishing condition.Type: GrantFiled: December 2, 2016Date of Patent: April 18, 2023Assignee: SUMCO CORPORATIONInventors: Toshiharu Nakajima, Kazuaki Kozasa, Katsuhisa Sugimori, Syunya Kobuchi
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Patent number: 11554458Abstract: A polishing head of a wafer polishing apparatus is provided with: a membrane head that can independently control a center control pressure pressing a center portion of a wafer, and an outer periphery control pressure pressing an outer peripheral portion of the wafer; an outer ring integrated with the membrane head so as to configure the outer peripheral portion of the membrane head; and a contact type retainer ring provided outside the membrane head. The membrane head has a central pressure chamber of a single compartment structure that controls the center control pressure, and an outer peripheral pressure chamber that is provided above the central pressure chamber, and that controls the outer periphery control pressure. A position of a lower end of the outer ring reaches at least a position of an inner bottom surface of the central pressure chamber.Type: GrantFiled: February 13, 2019Date of Patent: January 17, 2023Assignee: SUMCO CORPORATIONInventors: Yuki Nakano, Katsuhisa Sugimori, Kazuaki Kozasa, Jiro Kajiwara, Katsutoshi Yamamoto, Takayuki Kihara, Ryoya Terakawa
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Publication number: 20220415666Abstract: Provided is a wafer polishing method capable of improving nanotopography characteristics within a site on the surface of a wafer having a 2 mm square area or a small area equivalent thereto and a silicon wafer polished by the wafer polishing method, and further provided is a method of chemical-mechanical polishing the surface of a wafer through a polishing step in two or more polishing steps with different polishing rates, in which the in-plane thickness variation (standard deviation) of a polishing pad 150 used in a polishing step with a machining allowance of 0.3 ?m or more is 2.0 ?m or less.Type: ApplicationFiled: October 21, 2020Publication date: December 29, 2022Applicant: SUMCO CORPORATIONInventors: Kazuaki KOZASA, Katsuhisa SUGIMORI, Kazuki NISHIOKA, Tsuyoshi MORITA
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Publication number: 20210331285Abstract: A polishing head of a wafer polishing apparatus is provided with: a membrane head that can independently control a center control pressure pressing a center portion of a wafer, and an outer periphery control pressure pressing an outer peripheral portion of the wafer; an outer ring integrated with the membrane head so as to configure the outer peripheral portion of the membrane head; and a contact type retainer ring provided outside the membrane head. The membrane head has a central pressure chamber of a single compartment structure that controls the center control pressure, and an outer peripheral pressure chamber that is provided above the central pressure chamber, and that controls the outer periphery control pressure. A position of a lower end of the outer ring reaches at least a position of an inner bottom surface of the central pressure chamber.Type: ApplicationFiled: February 13, 2019Publication date: October 28, 2021Applicant: SUMCO CORPORATIONInventors: Yuki NAKANO, Katsuhisa SUGIMORI, Kazuaki KOZASA, Jiro KAJIWARA, Katsutoshi YAMAMOTO, Takayuki KIHARA, Ryoya TERAKAWA
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Publication number: 20190030676Abstract: A silicon wafer single-side polishing method that can significantly improve the stepped minute defect occurrence rate is provided. The silicon wafer single-side polishing method comprises: a first polishing step of performing polishing on one side of a silicon wafer under a first polishing condition; and a second polishing step of performing polishing on the silicon wafer under a second polishing condition in which at least one of an applied pressure and a relative speed in the first polishing condition is changed, after the first polishing step, wherein a polishing rate ratio according to the first polishing condition is higher than a polishing rate ratio according to the second polishing condition.Type: ApplicationFiled: December 2, 2016Publication date: January 31, 2019Applicant: SUMCO CORPORATIONInventors: Toshiharu NAKAJIMA, Kazuaki KOZASA, Katsuhisa SUGIMORI, Syunya KOBUCHI
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Patent number: 9991110Abstract: A mirror-finishing chamfer polishing is applied using an abrasive-grain-free polishing solution to a chamfered portion of a semiconductor wafer having an oxide film on a top side or the top and bottom sides of the semiconductor wafer and having no oxide film on the chamfered portion. Further, prior to the mirror-finishing chamfer polishing, a pre-finish mirror chamfer polishing is applied using an abrasive-grain-containing polishing solution to the chamfered portion of the semiconductor wafer having the oxide film on the top side or the top and bottom sides and on the chamfered portion.Type: GrantFiled: November 19, 2014Date of Patent: June 5, 2018Assignee: SUMCO CORPORATIONInventors: Kazuaki Kozasa, Syunya Kobuchi, Katsuhisa Sugimori
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Patent number: 9956663Abstract: A method of a polishing a wafer includes: a first polishing step of polishing a surface of the wafer while supplying a rough polishing liquid onto a polishing surface of a rough polishing cloth; subsequent to the first polishing step, a protection film formation step of supplying a protection film formation solution containing a water-soluble polymer to the rough polishing cloth after being used in the first polishing step and bringing the protection film formation solution into contact with the polished surface of the wafer to form a protection film on the polished surface; and a second polishing step of polishing the surface of the wafer where the protection film is formed while supplying a finish polishing liquid to a polishing surface of a finish polishing cloth different from the rough polishing cloth.Type: GrantFiled: May 13, 2015Date of Patent: May 1, 2018Assignee: SUMCO CORPORATIONInventors: Kazuaki Kozasa, Katsuhisa Sugimori, Syunya Kobuchi
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Publication number: 20170252891Abstract: A method of a polishing a wafer includes: a first polishing step of polishing a surface of the wafer while supplying a rough polishing liquid onto a polishing surface of a rough polishing cloth; subsequent to the first polishing step, a protection film formation step of supplying a protection film formation solution containing a water-soluble polymer to the rough polishing cloth after being used in the first polishing step and bringing the protection film formation solution into contact with the polished surface of the wafer to form a protection film on the polished surface; and a second polishing step of polishing the surface of the wafer where the protection film is formed while supplying a finish polishing liquid to a polishing surface of a finish polishing cloth different from the rough polishing cloth.Type: ApplicationFiled: May 13, 2015Publication date: September 7, 2017Applicant: SUMCO CORPORATIONInventors: Kazuaki KOZASA, Katsuhisa SUGIMORI, Syunya KOBUCHI
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Publication number: 20170011903Abstract: A mirror-finishing chamfer polishing is applied using an abrasive-grain-free polishing solution to a chamfered portion of a semiconductor wafer having an oxide film on a top side or the top and bottom sides of the semiconductor wafer and having no oxide film on the chamfered portion. Further, prior to the mirror-finishing chamfer polishing, a pre-finish mirror chamfer polishing is applied using an abrasive-grain-containing polishing solution to the chamfered portion of the semiconductor wafer having the oxide film on the top side or the top and bottom sides and on the chamfered portion.Type: ApplicationFiled: November 19, 2014Publication date: January 12, 2017Applicant: SUMCO CORPORATIONInventors: Kazuaki KOZASA, Syunya KOBUCHI, Katsuhisa SUGIMORI