Abstract: A physical quantity detection circuit includes: an analog/digital conversion circuit performing analog/digital conversion processing on an analog signal based on an output signal from a physical quantity detection element and outputting a first digital signal; a digital arithmetic circuit having the first digital signal inputted thereto, performing arithmetic processing on the first digital signal, and outputting a second digital signal; and a regulator circuit supplying a power-supply voltage to the analog/digital conversion circuit and the digital arithmetic circuit. The digital arithmetic circuit does not perform an arithmetic processing start operation to start the arithmetic processing and an arithmetic processing end operation to end the arithmetic processing, during an analog/digital conversion period when the analog/digital conversion is performed.

Abstract: An electronic part including an integrated circuit and a memory, the integrated circuit including a first clock terminal to which a clock signal is inputted, a first data terminal via which a first serial data signal is inputted and outputted, a second clock terminal via which the clock signal is outputted to the memory, a second data terminal via which a second serial data signal is inputted and outputted from and to the memory, and a first interface circuit including a control circuit that controls the communication state of the integrated circuit to be a first communication state in which the first serial data signal inputted to the first data terminal is outputted as the second serial data signal via the second data terminal or a second communication state in which the second serial data signal inputted to the second data terminal is outputted as the first serial data signal via the first data terminal.

Abstract: A data transfer circuit includes: a one-time PROM storing first to m-th register addresses and first to m-th register data; first to n-th registers holding first to n-th data corresponding to first to n-th parameters controlling an operation of a functional element; and a data transfer control circuit acquiring the i-th register address and the i-th register data from the one-time PROM, transferring the i-th register data to the k-th register designated by the i-th register address, k being an integer equal to or greater than 1 and equal to or smaller than n, and updating the k-th data with the i-th register data.

Abstract: A physical quantity detection circuit includes: an analog/digital conversion circuit performing analog/digital conversion processing on an analog signal based on an output signal from a physical quantity detection element and outputting a first digital signal; a digital arithmetic circuit having the first digital signal inputted thereto, performing arithmetic processing on the first digital signal, and outputting a second digital signal; and a regulator circuit supplying a power-supply voltage to the analog/digital conversion circuit and the digital arithmetic circuit. The digital arithmetic circuit does not perform an arithmetic processing start operation to start the arithmetic processing and an arithmetic processing end operation to end the arithmetic processing, during an analog/digital conversion period when the analog/digital conversion is performed.

Abstract: A circuit apparatus includes an oscillation circuit that causes a resonator to oscillate to produce an oscillation signal, an oven control circuit that controls a heater provided in correspondence with the resonator, a non-volatile memory that stores control data, a holding circuit that holds the control data transferred from the non-volatile memory, and a processing circuit that carries out a process based on the control data held in the holding circuit. After a power source voltage is supplied, the processing circuit carries out the process of transferring the control data from the non-volatile memory to the holding circuit, and after the transfer of the control data is completed, the processing circuit causes based on a data transfer end signal the oven control circuit to start operating.

Abstract: A circuit apparatus includes an oscillation circuit that causes a resonator to oscillate to produce an oscillation signal, an oven control circuit that controls a heater provided in correspondence with the resonator, a non-volatile memory that stores control data, a holding circuit that holds the control data transferred from the non-volatile memory, and a processing circuit that carries out a process based on the control data held in the holding circuit. After a power source voltage is supplied, the processing circuit carries out the process of transferring the control data from the non-volatile memory to the holding circuit, and after the transfer of the control data is completed, the processing circuit causes based on a data transfer end signal the oven control circuit to start operating.

Abstract: A data transfer circuit includes: a one-time PROM storing first to m-th register addresses and first to m-th register data; first to n-th registers holding first to n-th data corresponding to first to n-th parameters controlling an operation of a functional element; and a data transfer control circuit acquiring the i-th register address and the i-th register data from the one-time PROM, transferring the i-th register data to the k-th register designated by the i-th register address, k being an integer equal to or greater than 1 and equal to or smaller than n, and updating the k-th data with the i-th register data.

Abstract: An electronic part including an integrated circuit and a memory, the integrated circuit including a first clock terminal to which a clock signal is inputted, a first data terminal via which a first serial data signal is inputted and outputted, a second clock terminal via which the clock signal is outputted to the memory, a second data terminal via which a second serial data signal is inputted and outputted from and to the memory, and a first interface circuit including a control circuit that controls the communication state of the integrated circuit to be a first communication state in which the first serial data signal inputted to the first data terminal is outputted as the second serial data signal via the second data terminal or a second communication state in which the second serial data signal inputted to the second data terminal is outputted as the first serial data signal via the first data terminal.

Abstract: A circuit device includes a digital signal processor (DSP) that performs first up-sampling processing of up-sampling up-sampling target data having a first sampling frequency from the first sampling frequency to a second sampling frequency by first interpolation processing, and an arithmetic circuit that performs second up-sampling processing of up-sampling data output from the DSP from the second sampling frequency to a third sampling frequency by second interpolation processing.

Abstract: A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a signal process, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of frequency control data from the processor. The circuit device also includes at least one of a first register that stores phase comparison result data, a second register in which one of offset adjustment data for GPS and offset adjustment data for UTC is set, and a third register in which offset adjustment data for adjusting a phase difference is set.

Abstract: A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a digital signal process on phase comparison result data which is a result of the phase comparison so as to generate frequency control data, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of the frequency control data. The processor performs the digital signal process by using data used when a hold-over state is ended in a case where the hold-over state occurs due to the absence or the abnormality of the reference signal, and then the hold-over state is ended.

Abstract: A circuit device includes a digital signal processor (DSP) that performs first up-sampling processing of up-sampling up-sampling target data having a first sampling frequency from the first sampling frequency to a second sampling frequency by first interpolation processing, and an arithmetic circuit that performs second up-sampling processing of up-sampling data output from the DSP from the second sampling frequency to a third sampling frequency by second interpolation processing.

Abstract: A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a signal process on frequency control data based on a result of the phase comparison, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of frequency control data having undergone the signal process. The phase comparator includes a counter that performs a count operation by using the input signal, and performs the phase comparison by comparing a count value in the counter inn (where n is an integer of 2 or more) cycles of the reference signal with an expected value of the count value in integers.

Abstract: A detection device includes: a drive circuit that receives a feedback signal from a vibrator and drives the vibrator; a detection circuit that performs detection based on a signal from the vibrator and outputs detection data; and a digital signal processing unit that performs digital filtering for the detection data from the detection circuit. The digital signal processing unit performs band elimination filtering for attenuating a component of a detuning frequency ?f=|fd?fs| corresponding to a difference between a drive side resonance frequency fd and a detection side resonance frequency fs of the vibrator for the detection data.

Abstract: An IC for a sensor includes a detection unit which detects an angular velocity signal of a moving object based on a signal from a sensor element, an AD conversion unit which converts an analog signal from the detection unit into a digital signal, and a posture variation calculating unit which calculates a variation in posture of the moving object during a predetermined period based on the signal from the AD conversion unit.

Abstract: A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a signal process, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of frequency control data from the processor. The circuit device also includes at least one of a first register that stores phase comparison result data, a second register in which one of offset adjustment data for GPS and offset adjustment data for UTC is set, and a third register in which offset adjustment data for adjusting a phase difference is set.

Abstract: A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a signal process on frequency control data based on a result of the phase comparison, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of frequency control data having undergone the signal process. The phase comparator includes a counter that performs a count operation by using the input signal, and performs the phase comparison by comparing a count value in the counter inn (where n is an integer of 2 or more) cycles of the reference signal with an expected value of the count value in integers.

Abstract: A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a digital signal process on phase comparison result data which is a result of the phase comparison so as to generate frequency control data, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of the frequency control data. The processor performs the digital signal process by using data used when a hold-over state is ended in a case where the hold-over state occurs due to the absence or the abnormality of the reference signal, and then the hold-over state is ended.

Abstract: A serial communication circuit includes a receiving unit configured to serially receive input data including a command and a synchronization identification code that is different from the command and a determining unit configured to receive the synchronization identification code from the receiving unit and when the synchronization identification code coincides with a slave selection value, to instruct a start of response processing based on the command.

Abstract: A IC for sensor includes a detector which detects an angular velocity signal based on a signal from a sensor element, an AD converter which converts an analog signal from the detector into a digital signal, and a DC component detector which detects a DC component from the digital signal output from the AD converter within a predetermined period of time.