Patents by Inventor Katsuichi Oyama

Katsuichi Oyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11611395
    Abstract: First compensation circuitry includes a first digital filter compensating a phase difference between a phase of a symbol of a received signal and a sampling timing, and first filter coefficient calculation circuitry calculating a filter coefficient of the first digital filter as a first filter coefficient. Second filter coefficient calculation circuitry calculates, as a second filter coefficient, a filter coefficient for adaptive equalization that compensates distortion due to temporally changing polarization dispersion, based on an output of the first digital filter. Coefficient combination circuitry combines the first filter coefficient and the second filter coefficient. Second compensation circuitry includes a second digital filter which uses a filter coefficient combined by the coefficient combination circuitry and performs a compensation of the phase difference between the phase of the symbol of the received signal and the sampling timing, and a process of the adaptive equalization at the same time.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: March 21, 2023
    Assignee: NTT ELECTRONICS CORPORATION
    Inventors: Tomohiro Takamuku, Mitsuteru Yoshida, Tsutomu Takeya, Kazuhito Takei, Katsuichi Oyama, Tomoharu Semboku
  • Patent number: 11329764
    Abstract: An error correction device includes a first correction unit which performs error correction decoding of data by a repetitive operation, having a full operation state in which the error correction decoding is repeated until convergence is obtained and a save operation state in which the number of times of the repetitive operation is restricted to a predetermined number. An error information estimation unit estimates an input error rate or an output error rate of the first correction unit using a decoding result of the first correction unit, and a control unit which controls transition between the full operation state and the save operation state based on at least one piece of information of the input error rate, the output error rate, and an operation time of the first correction unit. It is thus possible to provide an error correction device that can improve a transmission characteristic while suppressing power consumption.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: May 10, 2022
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Fumiaki Nakagawa, Yasuharu Onuma, Katsuichi Oyama, Yasuyuki Endoh, Etsushi Yamazaki, Yoshiaki Kisaka, Masahito Tomizawa
  • Patent number: 11323238
    Abstract: A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: May 3, 2022
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Mitsuteru Yoshida, Yasuyuki Endoh, Katsuichi Oyama, Masayuki Ikeda, Tsutomu Takeya, Etsushi Yamazaki, Yoshiaki Kisaka, Masahito Tomizawa
  • Patent number: 11201721
    Abstract: A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: December 14, 2021
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Mitsuteru Yoshida, Yasuyuki Endoh, Katsuichi Oyama, Masayuki Ikeda, Tsutomu Takeya, Etsushi Yamazaki, Yoshiaki Kisaka, Masahito Tomizawa
  • Publication number: 20210344424
    Abstract: First compensation circuitry includes a first digital filter compensating a phase difference between a phase of a symbol of a received signal and a sampling timing, and first filter coefficient calculation circuitry calculating a filter coefficient of the first digital filter as a first filter coefficient. Second filter coefficient calculation circuitry calculates, as a second filter coefficient, a filter coefficient for adaptive equalization that compensates distortion due to temporally changing polarization dispersion, based on an output of the first digital filter. Coefficient combination circuitry combines the first filter coefficient and the second filter coefficient. Second compensation circuitry includes a second digital filter which uses a filter coefficient combined by the coefficient combination circuitry and performs a compensation of the phase difference between the phase of the symbol of the received signal and the sampling timing, and a process of the adaptive equalization at the same time.
    Type: Application
    Filed: October 7, 2019
    Publication date: November 4, 2021
    Applicant: NTT Electronics Corporation
    Inventors: Tomohiro TAKAMUKU, Mitsuteru YOSHIDA, Tsutomu TAKEYA, Kazuhito TAKEI, Katsuichi OYAMA, Tomoharu SEMBOKU
  • Patent number: 11121778
    Abstract: A known pattern comparison type phase difference detection unit (12) detects a phase difference between a known pattern extracted from a received signal and a true value of the known pattern as a first phase difference. M indicates the number of modulation phases in a phase modulation method of the received signal. An M-th power type phase difference detection unit (13) removes a modulation component by raising the received signal to M-th power, and detects phase variation from a modulation phase point used for mapping on a transmission side, as a second phase difference. A phase compensation unit (11) compensates phase variation of the received signal based on an addition result of the first phase difference and the second phase difference.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: September 14, 2021
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Tomohiro Takamuku, Mitsuteru Yoshida, Tsutomu Takeya, Katsuichi Oyama, Hiroyuki Nouchi, Atsushi Suenaga
  • Publication number: 20210273777
    Abstract: A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination.
    Type: Application
    Filed: June 6, 2019
    Publication date: September 2, 2021
    Inventors: Mitsuteru YOSHIDA, Yasuyuki ENDOH, Katsuichi OYAMA, Masayuki IKEDA, Tsutomu TAKEYA, Etsushi YAMAZAKI, Yoshiaki KISAKA, Masahito TOMIZAWA
  • Publication number: 20210273732
    Abstract: A known pattern comparison type phase difference detection unit (12) detects a phase difference between a known pattern extracted from a received signal and a true value of the known pattern as a first phase difference. M indicates the number of modulation phases in a phase modulation method of the received signal. An M-th power type phase difference detection unit (13) removes a modulation component by raising the received signal to M-th power, and detects phase variation from a modulation phase point used for mapping on a transmission side, as a second phase difference. A phase compensation unit (11) compensates phase variation of the received signal based on an addition result of the first phase difference and the second phase difference.
    Type: Application
    Filed: July 22, 2019
    Publication date: September 2, 2021
    Applicant: NTT Electronics Corporation
    Inventors: Tomohiro TAKAMUKU, Mitsuteru YOSHIDA, Tsutomu TAKEYA, Katsuichi OYAMA, Hiroyuki NOUCHI, Atsushi SUENAGA
  • Publication number: 20210167939
    Abstract: A frame synchronization apparatus (10) according to this invention includes a multiplication unit (11) configured to multiply a received signal by an inverse complex number of a predetermined synchronization pattern with respect to a predetermined signal point on a complex space diagram for each of a plurality of symbols of the received signal, an addition average unit (12) configured to perform addition averaging of outputs from the multiplication unit for the plurality of symbols of the received signal, and a synchronization determination unit (13) configured to perform coincidence determination of whether an output from the addition average unit (12) falls within a predetermined coincidence determination range of the predetermined signal point, and determine a synchronization state of the frame synchronization based on a result of the coincidence determination.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 3, 2021
    Inventors: Mitsuteru YOSHIDA, Yasuyuki ENDOH, Katsuichi OYAMA, Masayuki IKEDA, Tsutomu TAKEYA, Etsushi YAMAZAKI, Yoshiaki KISAKA, Masahito TOMIZAWA
  • Publication number: 20210075541
    Abstract: An error correction device according to this invention includes a first correction unit configured to perform error correction decoding of data by a repetitive operation, and having a full operation state in which the repetitive operation of the error correction decoding is repeated until convergence is obtained and a save operation state in which the number of times of the repetitive operation of the error correction decoding is restricted to a predetermined number of times, an error information estimation unit configured to estimate an input error rate or an output error rate of the first correction unit using a decoding result of the first correction unit, and a control unit configured to control transition between the full operation state and the save operation state of the first correction unit based on at least one piece of information of the input error rate, the output error rate, and an operation time of the first correction unit.
    Type: Application
    Filed: December 20, 2018
    Publication date: March 11, 2021
    Inventors: Fumiaki NAKAGAWA, Yasuharu ONUMA, Katsuichi OYAMA, Yasuyuki ENDOH, Etsushi YAMAZAKI, Yoshiaki KISAKA, Masahito TOMIZAWA
  • Patent number: 10880193
    Abstract: A plurality of error correction circuits corrects errors of the data transmitted through the plurality of transmission lines. A combining portion combines the plurality of transmission lines to the plurality of error correction circuits. The plurality of transmission lines includes a first transmission line, and a second transmission line having a lower transmission characteristic than the first transmission line. The plurality of error correction circuits includes a first and a second error correction circuit having lower error correction capability and power consumption than the first error correction circuit. The combining portion uses a function to combine a plurality of error correction circuits with one transmission path, combines the first transmission line with the second error correction circuit at a higher rate than the first error correction circuit, and combines the second transmission line with the first error correction circuit at a higher rate than the second error correction circuit.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 29, 2020
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Mitsuteru Yoshida, Yasuyuki Endo, Etsushi Yamazaki, Katsuichi Oyama, Yasuharu Onuma, Masahito Tomizawa
  • Patent number: 10608743
    Abstract: A reception circuit includes a first adaptive compensator compensating distortion of a received signal. An adaptive compensation coefficient calculator includes a known-signal detector detecting first and second known-signals from the received signal, a second adaptive compensator compensating distortion of the received signal, a tap coefficient initial value calculator calculating an initial value of a tap coefficient of the second adaptive compensator by comparing the first known-signal with its true value, a first phase shift compensator compensating phase shift of an output of the second adaptive compensator using the second known-signal, and a tap coefficient calculator calculating tap coefficients of the first and second adaptive compensators by comparing at least one of the first and second known-signals compensated by the second adaptive compensator and the first phase shift compensator with its true value.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: March 31, 2020
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Tomohiro Takamuku, Etsushi Yamazaki, Katsuichi Oyama, Yasuharu Onuma, Kazuhito Takei, Masanori Nakamura, Mitsuteru Yoshida, Masahito Tomizawa, Yoshiaki Kisaka
  • Publication number: 20200028767
    Abstract: A plurality of error correction circuits corrects errors of the data transmitted through the plurality of transmission lines. A combining portion combines the plurality of transmission lines to the plurality of error correction circuits. The plurality of transmission lines includes a first transmission line, and a second transmission line having a lower transmission characteristic than the first transmission line. The plurality of error correction circuits includes a first and a second error correction circuit having lower error correction capability and power consumption than the first error correction circuit. The combining portion uses a function to combine a plurality of error correction circuits with one transmission path, combines the first transmission line with the second error correction circuit at a higher rate than the first error correction circuit, and combines the second transmission line with the first error correction circuit at a higher rate than the second error correction circuit.
    Type: Application
    Filed: December 15, 2017
    Publication date: January 23, 2020
    Applicants: NTT Electronics Corporation, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Mitsuteru YOSHIDA, Yasuyuki ENDO, Etsushi YAMAZAKI, Katsuichi OYAMA, Yasuharu ONUMA, Masahito TOMIZAWA
  • Patent number: 10419127
    Abstract: A symbol phase difference compensating portion (6) calculates a first phase difference which is a phase difference between a known pattern extracted from a received signal and a true value of the known pattern and performs phase compensation for the received signal based on the first phase difference. A tentative determination portion (12) tentatively determines an output signal of the symbol phase difference compensating portion (6) to acquire an estimated value of a phase. A first phase difference acquiring portion (13) acquires a second phase difference which is a phase difference between a phase of the output signal and the estimated value of the phase acquired by the tentative determination portion (12). A first phase difference compensating portion (14) performs phase compensation for the output signal based on the second phase difference.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: September 17, 2019
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Etsushi Yamazaki, Hiroyukl Nouchi, Yasuharu Onuma, Tomohiro Takamuku, Katsuichi Oyama, Kazuhito Takei, Masahito Tomizawa, Yoshiaki Kisaka, Mltsuteru Yoshida, Masanori Nakamura
  • Patent number: 10396895
    Abstract: In a method in which a compensation coefficient calculating portion (6) calculates a compensation coefficient of a compensation portion (5) which compensates transmission characteristics of a signal, a known signal is extracted from the signal. Next, a pseudo-random number is added to the extracted known signal. Next, the compensation coefficient is calculated by comparing a true value of the known signal with the known signal to which the pseudo-random number is added.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: August 27, 2019
    Assignee: NTT ELECTRONICS CORPORATION
    Inventors: Tomohiro Takamuku, Etsushi Yamazaki, Yuki Yoshida, Katsuichi Oyama, Yasuharu Onuma, Akihiro Yamagishi
  • Patent number: 10374718
    Abstract: An I component compensation unit calculates an I component in which a distortion has been compensated, by forming a first polynomial expressing the distortion of the I component based on an I component and a Q component of a quadrature modulation signal and multiplying each term of the first polynomial by a first coefficient. A Q component compensation unit calculates a Q component in which a distortion has been compensated, by forming a second polynomial expressing the distortion of the Q component based on the I component and the Q component of the quadrature modulation signal and multiplying each term of the second polynomial by a second coefficient. A coefficient calculation unit calculates the first and second coefficients by comparing outputs of the I component compensation unit and the Q component compensation unit and a known signal.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: August 6, 2019
    Assignees: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yasuharu Onuma, Etsushi Yamazaki, Hiroyuki Nouchi, Tomohiro Takamuku, Katsuichi Oyama, Kazuhito Takei, Masanori Nakamura, Mitsuteru Yoshida, Masahito Tomizawa
  • Publication number: 20190132051
    Abstract: An I component compensation unit calculates an I component in which a distortion has been compensated, by forming a first polynomial expressing the distortion of the I component based on an I component and a Q component of a quadrature modulation signal and multiplying each term of the first polynomial by a first coefficient. A Q component compensation unit calculates a Q component in which a distortion has been compensated, by forming a second polynomial expressing the distortion of the Q component based on the I component and the Q component of the quadrature modulation signal and multiplying each term of the second polynomial by a second coefficient. A coefficient calculation unit calculates the first and second coefficients by comparing outputs of the I component compensation unit and the Q component compensation unit and a known signal.
    Type: Application
    Filed: June 21, 2017
    Publication date: May 2, 2019
    Inventors: Yasuharu ONUMA, Etsushi YAMAZAKI, Hiroyuki NOUCHI, Tomohiro TAKAMUKU, Katsuichi OYAMA, Kazuhito TAKEI, Masanori NAKAMURA, Mitsuteru YOSHIDA, Masahito TOMIZAWA
  • Publication number: 20190074909
    Abstract: A symbol phase difference compensating portion (6) calculates a first phase difference which is a phase difference between a known pattern extracted from a received signal and a true value of the known pattern and performs phase compensation for the received signal based on the first phase difference. A tentative determination portion (12) tentatively determines an output signal of the symbol phase difference compensating portion (6) to acquire an estimated value of a phase. A first phase difference acquiring portion (13) acquires a second phase difference which is a phase difference between a phase of the output signal and the estimated value of the phase acquired by the tentative determination portion (12). A first phase difference compensating portion (14) performs phase compensation for the output signal based on the second phase difference.
    Type: Application
    Filed: April 13, 2017
    Publication date: March 7, 2019
    Inventors: Etsushi YAMAZAKI, Hiroyukl NOUCHI, Yasuharu ONUMA, Tomohiro TAKAMUKU, Katsuichi OYAMA, Kazuhito TAKEI, Masahito TOMIZAWA, Yoshiaki KISAKA, Mltsuteru YOSHIDA, Masanori NAKAMURA
  • Publication number: 20190074903
    Abstract: A reception circuit includes a first adaptive compensator compensating distortion of a received signal. An adaptive compensation coefficient calculator includes a known-signal detector detecting first and second known-signals from the received signal, a second adaptive compensator compensating distortion of the received signal, a tap coefficient initial value calculator calculating an initial value of a tap coefficient of the second adaptive compensator by comparing the first known-signal with its true value, a first phase shift compensator compensating phase shift of an output of the second adaptive compensator using the second known-signal, and a tap coefficient calculator calculating tap coefficients of the first and second adaptive compensators by comparing at least one of the first and second known-signals compensated by the second adaptive compensator and the first phase shift compensator with its true value.
    Type: Application
    Filed: May 26, 2017
    Publication date: March 7, 2019
    Inventors: Tomohiro TAKAMUKU, Etsushi YAMAZAKI, Katsuichi OYAMA, Yasuharu ONUMA, Kazuhito TAKEI, Masanori NAKAMURA, Mitsuteru YOSHIDA, Masahito TOMIZAWA, Yoshiaki KISAKA
  • Publication number: 20190036613
    Abstract: In a method in which a compensation coefficient calculating portion (6) calculates a compensation coefficient of a compensation portion (5) which compensates transmission characteristics of a signal, a known signal is extracted from the signal. Next, a pseudo-random number is added to the extracted known signal. Next, the compensation coefficient is calculated by comparing a true value of the known signal with the known signal to which the pseudo-random number is added.
    Type: Application
    Filed: April 26, 2017
    Publication date: January 31, 2019
    Inventors: Tomohiro TAKAMUKU, Etsushi YAMAZAKI, Yuki YOSHIDA, Katsuichi OYAMA, Yasuharu ONUMA, Akihiro YAMAGISHI