Abstract: The present invention is a method for mounting, on a ceramic substrate (9), an LED chip (1), in which an upper surface of a positive electrode (6) is in a higher position than an upper surface of a negative electrode (5). The method includes the steps of: (i) laminating resist (16) on the negative electrode (5) and the positive electrode (6) and forming openings (16a and 16b) in the resist (16); (ii) forming bumps (11 and 12) in the respective openings (16a and 16b); (iii) removing the resist (16); and (iv) bonding bumps (11 and 12) to the ceramic substrate (9). A cross-sectional area of the opening (16a) is larger than a cross-sectional area of the opening (16b).

Abstract: The present invention is a method for mounting, on a ceramic substrate (9), an LED chip (1), in which an upper surface of a positive electrode (6) is in a higher position than an upper surface of a negative electrode (5). The method includes the steps of: (i) laminating resist (16) on the negative electrode (5) and the positive electrode (6) and forming openings (16a and 16b) in the resist (16); (ii) forming bumps (11 and 12) in the respective openings (16a and 16b); (iii) removing the resist (16); and (iv) bonding bumps (11 and 12) to the ceramic substrate (9). A cross-sectional area of the opening (16a) is larger than a cross-sectional area of the opening (16b).

Abstract: At step S101, a TiW film is formed by a sputtering method so as to cover a surface protection film and pad electrodes formed on a surface of a semiconductor element. Subsequently, an Au film is formed on the TiW film. At step S103, Au bumps are formed on the Au film using the Au film as a plating electrode. At step S105, unnecessary parts of the Au film are removed. At step S106, unnecessary parts of the TiW film are removed. At step S107, iodine left in areas where the unnecessary parts of the TiW film have been removed, is removed.

Abstract: One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

Abstract: One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

Abstract: A plating processing device is so arranged that at least a part of a portion touching plating liquid is made of a material whose change rate of surface roughness in response to a removing agent is lower than resin when the material and the resin are measured in the same conditions. For example, a storage tank (1), a plating processing tank (2), a buffer tank (3), and a pipe (9) are made of hard glass and quartz glass. With this, it is possible to prevent a plating material from being deposited as foreign body on wall surfaces of the plating processing tank, etc.