Patents by Inventor Katsuji Matsumoto

Katsuji Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210359120
    Abstract: A semiconductor device includes: a semiconductor substrate; a channel layer on the semiconductor substrate; a barrier layer on the channel layer; a gate electrode on the barrier layer via a gate insulating film; a source electrode and a drain electrode on the channel layer with the gate electrode interposed therebetween; a substrate opening that penetrates the channel layer and exposes the semiconductor substrate; an insulating film provided from upper parts of the gate electrode, the source electrode, and the drain electrode to an inner side of the substrate opening; and a wiring line layer on the insulating film, and electrically coupled to one of the gate electrode, the source electrode, and the drain electrode via an opening on the insulating film, in which at least a portion of the substrate opening is in an activation region in which the gate electrode, the source electrode, and the drain electrode are provided.
    Type: Application
    Filed: September 20, 2019
    Publication date: November 18, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Katsuji MATSUMOTO, Masashi YANAGITA
  • Publication number: 20200233098
    Abstract: The present technology relates to a light-receiving device that makes it possible to simplify readout from a plurality of pixels and a process after the readout, without deteriorating light receiving sensitivity and characteristics in resolution. A plurality of unit elements is disposed above a substrate, each of the unit elements including a plurality of pixels disposed in m number of rows and n number of columns, and a readout section that sequentially reads out signals from a plurality of pixels disposed in a column direction among the plurality of pixels. The number of readout sections is at least the same as the number of columns. The readout section includes a QV amplifier. The present technology is applicable to the light-receiving device that detects radiation.
    Type: Application
    Filed: February 8, 2018
    Publication date: July 23, 2020
    Inventors: KATSUJI MATSUMOTO, TAKAHIRO IGARASHI, TAKAHIRO SONODA
  • Publication number: 20190103501
    Abstract: A light-receiving device of an embodiment of the present disclosure includes, on a first principal surface of a semiconductor layer, a pixel region that includes a plurality of light-receiving pixels each receiving light incident from side of a second principal surface of the semiconductor layer. The light-receiving device further includes, throughout a gap between the second principal surface and the pixel region, a low-impurity region having a relatively lower impurity concentration than the pixel region. The light-receiving pixels each include one or a plurality of photoelectric current extraction regions each including, on the first principal surface, an anode region and a cathode region, and a circuit region that is electrically coupled to each of the cathode regions and is electrically separated from the impurity region.
    Type: Application
    Filed: February 15, 2017
    Publication date: April 4, 2019
    Applicant: SONY CORPORATION
    Inventors: Takahiro IGARASHI, Takahiro SONODA, Atsushi SUZUKI, Shinya YAMAKAWA, Hiroshi YUMOTO, Izuho HATADA, Takeshi KODAMA, Kiwamu ADACHI, Katsuji MATSUMOTO
  • Publication number: 20190049599
    Abstract: An imaging apparatus includes: a substrate; and a plurality of device sections each including a photoelectric converter and disposed on the substrate to be spaced from one another and to collectively form a concave shape.
    Type: Application
    Filed: January 17, 2017
    Publication date: February 14, 2019
    Applicant: SONY CORPORATION
    Inventors: Katsuji MATSUMOTO, Shusaku YANAGAWA, Takahiro IGARASHI, Hiroshi ICHIKI
  • Patent number: 10134662
    Abstract: A method of manufacturing a mounting substrate according to an embodiment of the present technology includes the following three steps: (1) a step of forming a plurality of electrodes on a semiconductor layer, and thereafter forming one of solder bumps at a position facing each of the electrodes; (2) a step of covering the solder bumps with a coating layer, and thereafter selectively etching the semiconductor layer with use of the coating layer as a mask to separate the semiconductor layer into a plurality of elements; and (3) a step of removing the coating layer, and thereafter mounting the elements on a wiring substrate to direct the solder bumps toward the wiring substrate, thereby forming the mounting substrate.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: November 20, 2018
    Assignee: Sony Corporation
    Inventors: Kiwamu Adachi, Katsuji Matsumoto, Takeshi Kodama, Shuichi Oka, Hiizu Ootorii, Kazunari Saitou, Kei Satou
  • Patent number: 9929199
    Abstract: There is provided a radiation detector including: a plurality of photoelectric conversion devices, each photoelectric conversion device formed at least partially within an embedding layer and having a light receiving surface situated at least partially outside of the embedding layer, and a plurality of scintillator crystals, at least a first scintillator crystal of the plurality of scintillator crystals in contact with at least one light receiving surface at a proximal end, wherein a cross-section of the first scintillator crystal at the proximal end is smaller than a cross-section of the first scintillator crystal at a distal end.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: March 27, 2018
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takahiro Igarashi, Izuho Hatada, Takeshi Kodama, Kiwamu Adachi, Shuichi Oka, Shun Mitarai, Hiizu Ootorii, Shusaku Yanagawa, Katsuji Matsumoto
  • Publication number: 20170287823
    Abstract: A method of manufacturing a mounting substrate according to an embodiment of the present technology includes the following three steps: (1) a step of forming a plurality of electrodes on a semiconductor layer, and thereafter forming one of solder bumps at a position facing each of the electrodes; (2) a step of covering the solder bumps with a coating layer, and thereafter selectively etching the semiconductor layer with use of the coating layer as a mask to separate the semiconductor layer into a plurality of elements; and (3) a step of removing the coating layer, and thereafter mounting the elements on a wiring substrate to direct the solder bumps toward the wiring substrate, thereby forming the mounting substrate.
    Type: Application
    Filed: September 8, 2015
    Publication date: October 5, 2017
    Applicant: Sony Corporation
    Inventors: Kiwamu Adachi, Katsuji Matsumoto, Takeshi Kodama, Shuichi Oka, Hiizu Ootorii, Kazunari Saitou, Kei Satou
  • Patent number: 9391036
    Abstract: A semiconductor device includes a first semiconductor electronic component which includes a pad electrode, a solder bump, and a metal layer between a pad and solder that is configured to have an underlying metal layer formed between the pad electrode and the solder bump and connected to the pad electrode, and a main metal layer formed on the underlying metal layer, and in which the main metal layer has an eave portion at an outer edge portion thereof.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: July 12, 2016
    Assignee: SONY CORPORATION
    Inventors: Katsuji Matsumoto, Hiizu Ootorii
  • Publication number: 20160163754
    Abstract: There is provided a radiation detector including: a plurality of photoelectric conversion devices, each photoelectric conversion device formed at least partially within an embedding layer and having a light receiving surface situated at least partially outside of the embedding layer, and a plurality of scintillator crystals, at least a first scintillator crystal of the plurality of scintillator crystals in contact with at least one light receiving surface at a proximal end, wherein a cross-section of the first scintillator crystal at the proximal end is smaller than a cross-section of the first scintillator crystal at a distal end.
    Type: Application
    Filed: August 21, 2014
    Publication date: June 9, 2016
    Inventors: Takahiro Igarashi, Izuho Hatada, Takeshi Kodama, Kiwamu Adachi, Shuichi Oka, Shun Mitarai, Hiizu Ootoril, Shusaku Yanagawa, Katsuji Matsumoto
  • Publication number: 20140361431
    Abstract: A semiconductor device includes a first semiconductor electronic component which includes a pad electrode, a solder bump, and a metal layer between a pad and solder that is configured to have an underlying metal layer formed between the pad electrode and the solder bump and connected to the pad electrode, and a main metal layer formed on the underlying metal layer, and in which the main metal layer has an eave portion at an outer edge portion thereof.
    Type: Application
    Filed: June 3, 2014
    Publication date: December 11, 2014
    Applicant: Sony Corporation
    Inventors: Katsuji Matsumoto, Hiizu Ootorii
  • Patent number: 8482107
    Abstract: A device that comprises a plurality of circuit elements on a substrate; a shielding element between at least two of the plurality of circuit elements; and a bonding element that electrically connects the shielding element to a grounding circuit of a semiconductor chip that is on the substrate.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: July 9, 2013
    Assignee: Sony Corporation
    Inventors: Shinji Rokuhara, Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Patent number: 8338912
    Abstract: Disclosed herein is an inductor module including a substrate functioning as a printed wiring board or an interposer; an IC mounting part formed on a surface of the substrate; an inductor which is formed in the substrate at such a position as to overlap with the IC mounting part on a plan-view basis and which is connected to an IC mounted on the IC mounting part; and a magnetic body including a magnetic material selected from among a NiZn ferrite, a NiZnCu ferrite and a Ba ferrite, the magnetic body being disposed intermediately between the IC mounting part and the inductor.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Publication number: 20120241204
    Abstract: A thin film capacitor includes: two electrode layers; a dielectric film interposed between the two electrode layers; an opening that pierces through, together with the dielectric film, in the thickness direction, any one of the two electrode layers or a conductive layer in the same level adjacent to one of the two electrode layers; and a reinforcing member that couples, in the opening, a side surface of the dielectric film to a side surface of the one electrode layer or the conductive layer.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 27, 2012
    Applicant: SONY CORPORATION
    Inventors: Katsuji Matsumoto, Shusaku Yanagawa, Satoshi Horiuchi, Shuichi Oka
  • Patent number: 8254144
    Abstract: A circuit board laminated module includes: a first circuit board having a multi-layer structure in which ground layers are provided in a plurality of layers; a second circuit board mounted on the first circuit board; and a semiconductor chip mounted on the second circuit board, wherein in the first circuit board, a noise guiding through via which guides an electromagnetic noise generated in the semiconductor chip to a lower layer side is provided on a side different from a circuit portion or a circuit element desired to be protected against influence of the electromagnetic noise in a surrounding direction of an occurrence place of the electromagnetic noise.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: August 28, 2012
    Assignee: Sony Corporation
    Inventors: Katsuji Matsumoto, Shusaku Yanagawa, Shuichi Oka, Shinji Rokuhara
  • Publication number: 20110156224
    Abstract: A device that comprises a plurality of circuit elements on a substrate; a shielding element between at least two of the plurality of circuit elements; and a bonding element that electrically connects the shielding element to a grounding circuit of a semiconductor chip that is on the substrate.
    Type: Application
    Filed: November 8, 2010
    Publication date: June 30, 2011
    Applicant: Sony Corporation
    Inventors: Shinji Rokuhara, Shuichi Oka, Katsuji Matsumoto, Shusaku Yanagawa
  • Publication number: 20110157857
    Abstract: A circuit board laminated module includes: a first circuit board having a multi-layer structure in which ground layers are provided in a plurality of layers; a second circuit board mounted on the first circuit board; and a semiconductor chip mounted on the second circuit board, wherein in the first circuit board, a noise guiding through via which guides an electromagnetic noise generated in the semiconductor chip to a lower layer side is provided on a side different from a circuit portion or a circuit element desired to be protected against influence of the electromagnetic noise in a surrounding direction of an occurrence place of the electromagnetic noise.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 30, 2011
    Applicant: Sony Corporation
    Inventors: Katsuji Matsumoto, Shusaku Yanagawa, Shuichi Oka, Shinji Rokuhara
  • Publication number: 20100148905
    Abstract: Disclosed herein is an inductor module including a coil section provided with an input terminal and an output terminal. At least one of the input terminal and the output terminal is composed of a plurality of terminals. The input terminal and the output terminal are connected at different positions. The connection of the plurality of terminals constituting the input terminal or the output terminal is switched so as to change the combination of the input terminal and the output terminal, obtaining different inductance values.
    Type: Application
    Filed: November 24, 2009
    Publication date: June 17, 2010
    Applicant: Sony Corporation
    Inventor: Katsuji Matsumoto
  • Publication number: 20090309185
    Abstract: Disclosed herein is an inductor module including a substrate functioning as a printed wiring board or an interposer; an IC mounting part formed on a surface of the substrate; an inductor which is formed in the substrate at such a position as to overlap with the IC mounting part on a plan-view basis and which is connected to an IC mounted on the IC mounting part; and a magnetic body including a magnetic material selected from among a NiZn ferrite, a NiZnCu ferrite and a Ba ferrite, the magnetic body being disposed intermediately between the IC mounting part and the inductor.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 17, 2009
    Applicant: Sony Corporation
    Inventors: Shuichi OKA, Katsuji MATSUMOTO, Shusaku YANAGAWA
  • Publication number: 20030045863
    Abstract: A sebum absorbing paper used for applying to skin or for cleaning the skin, which contains 1 to 30 weight % of inorganic filler and which has the basis weight of 5 to 25 g/m2 as defined in JIS P-8124. Further, this inorganic filler comprises hydroxyapatite.
    Type: Application
    Filed: August 21, 2002
    Publication date: March 6, 2003
    Inventors: Toshihiro Sadaoka, Hiroaki Katsube, Yuji Takechi, Akira Takeda, Yoshio Matsumoto, Katsuji Matsumoto
  • Publication number: 20020050626
    Abstract: A semiconductor device and a manufacturing method for the same achieve higher performance of an inductance element and also reduce contamination. The semiconductor device includes a second layer wire spirally formed and deposited, through the intermediary of an interlayer dielectric, on a first layer wire formed on a semiconductor substrate through the intermediary of an insulating layer, a protective film that is deposited on the second layer wire and has an opening in a portion corresponding to a region surrounded by the second layer wire, and a ferromagnetic member provided in the opening.
    Type: Application
    Filed: July 17, 2001
    Publication date: May 2, 2002
    Inventors: Norihiro Onuma, Katsuji Matsumoto