Patents by Inventor Katsuki Kusunoki

Katsuki Kusunoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9496459
    Abstract: A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a semiconductor layer containing a p-type cladding layer containing p-type impurities (Mg) and laminated on the light emitting layer. The light emitting layer has a multiple quantum well structure including first to fifth barrier layers and first to fourth well layers, and one well layer is sandwiched by two barrier layers. The thickness of the p-type cladding layer 161 is set at less than 3-times the thickness of each of the first to fourth well layer.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 15, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Patent number: 9099572
    Abstract: A semiconductor light emitting element includes: an n-type semiconductor layer; a light emitting layer alternately laminating plural barrier layers and plural well layers; and a p-type semiconductor layer, wherein the light emitting layer includes three or more well layers and four or more barrier layers, each well layer being sandwiched by the barrier layers, one barrier layer contacting the n-type semiconductor layer, and another barrier layer contacting the p-type semiconductor layer, the well layers include plural n-side well layers from the n-type semiconductor layer side and one p-side well layer on the p-type semiconductor layer side, and a V-shaped concave portion including inclined surfaces is generated in the light emitting layer, and in at least one of the n-side well layers, a concentration of atoms of In on the inclined surface is not more than 50% of a concentration of atoms of In in the n-side well layer.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: August 4, 2015
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Patent number: 8963122
    Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: February 24, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Publication number: 20140209921
    Abstract: A semiconductor light emitting element includes: an n-type semiconductor layer; a light emitting layer alternately laminating plural barrier layers and plural well layers; and a p-type semiconductor layer, wherein the light emitting layer includes three or more well layers and four or more barrier layers, each well layer being sandwiched by the barrier layers, one barrier layer contacting the n-type semiconductor layer, and another barrier layer contacting the p-type semiconductor layer, the well layers include plural n-side well layers from the n-type semiconductor layer side and one p-side well layer on the p-type semiconductor layer side, and a V-shaped concave portion including inclined surfaces is generated in the light emitting layer, and in at least one of the n-side well layers, a concentration of atoms of In on the inclined surface is not more than 50% of a concentration of atoms of In in the n-side well layer.
    Type: Application
    Filed: December 18, 2013
    Publication date: July 31, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki KUSUNOKI, Hisao Sato
  • Publication number: 20140103355
    Abstract: A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a semiconductor layer containing a p-type cladding layer containing p-type impurities (Mg) and laminated on the light emitting layer. The light emitting layer has a multiple quantum well structure including first to fifth barrier layers and first to fourth well layers, and one well layer is sandwiched by two barrier layers. The thickness of the p-type cladding layer 161 is set at less than 3-times the thickness of each of the first to fourth well layer.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 17, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki KUSUNOKI, Hisao SATO
  • Publication number: 20140048767
    Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.
    Type: Application
    Filed: August 12, 2013
    Publication date: February 20, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki KUSUNOKI, Hisao SATO
  • Patent number: 8592240
    Abstract: Provided is a method for manufacturing a semiconductor light-emitting element having a narrow wavelength distribution and comprising a substrate and a group III compound semiconductor layer formed thereon, the substrate being made of a material different from the compound semiconductor constituting the semiconductor layer. The method for manufacturing a semiconductor light-emitting element having a group III compound semiconductor layer is characterized by comprising a semiconductor layer-forming step wherein a group III compound semiconductor layer having a total thickness of not less than 8 ?m is formed on a substrate (11) having a diameter D, a thickness and an amount of warpage H within the range of ±30 ?m. The method is also characterized in that the diameter D and the thickness d of the substrate (11) satisfy the following formula (1): 0.7×102?(D/d)?1.5×102??(1).
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: November 26, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Katsuki Kusunoki
  • Patent number: 8338203
    Abstract: A compound semiconductor light-emitting device has a light-emitting layer, on a substrate, wherein at least a part of a substrate portion of the device side surface has recessed portions in a side direction of the device.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 25, 2012
    Assignee: Showa Denko K.K.
    Inventor: Katsuki Kusunoki
  • Publication number: 20120153346
    Abstract: A laminated semiconductor wafer (10) to be processed is provided with a substrate (110) and a laminated semiconductor layer (100) formed on the substrate (110). The laminated semiconductor wafer (10) is heated to a temperature above the sublimation point of the laminated semiconductor layer (100) and under the melting point of the substrate (110). As a result, in the laminated semiconductor wafer (10), the laminated semiconductor layer (100) sublimes, and the laminated semiconductor layer (100) is eliminated from the substrate (110). In this way, the laminated semiconductor layer is eliminated from the laminated semiconductor wafer while suppressing damage to the substrate.
    Type: Application
    Filed: September 7, 2010
    Publication date: June 21, 2012
    Applicant: SHOWA DENKO K.K.
    Inventor: Katsuki Kusunoki
  • Publication number: 20110177642
    Abstract: Provided is a method for manufacturing a semiconductor light-emitting element having a narrow wavelength distribution and comprising a substrate and a group III compound semiconductor layer formed thereon, the substrate being made of a material different from the compound semiconductor constituting the semiconductor layer. The method for manufacturing a semiconductor light-emitting element having a group III compound semiconductor layer is characterized by comprising a semiconductor layer-forming step wherein a group III compound semiconductor layer having a total thickness of not less than 8 ?m is formed on a substrate (11) having a diameter D, a thickness and an amount of warpage H within the range of ±30 ?m. The method is also characterized in that the diameter D and the thickness d of the substrate (11) satisfy the following formula (1): 0.7×102?(D/d)?1.5×102??(1).
    Type: Application
    Filed: September 29, 2009
    Publication date: July 21, 2011
    Applicant: SHOWA DENKO K.K.
    Inventor: Katsuki Kusunoki
  • Publication number: 20100261301
    Abstract: A compound semiconductor light-emitting device has a light-emitting layer, on a substrate, wherein at least a part of a substrate portion of the device side surface has recessed portions in a side direction of the device.
    Type: Application
    Filed: June 23, 2010
    Publication date: October 14, 2010
    Applicant: Showa Denko K.K.
    Inventor: Katsuki KUSUNOKI
  • Publication number: 20100233835
    Abstract: An object of the present invention is to provide a method for producing a compound semiconductor device wafer, which method enables cleaving of a wafer with precision and at remarkably high yield, attains high process speed, and improves productivity. The inventive method for producing a compound semiconductor device wafer, the wafer including a substrate and a plurality of compound semiconductor devices provided on the substrate and arranged with separation zones being disposed between the compound semiconductor devices, comprises a step of forming separation grooves, through laser processing, on the top surface of the substrate (i.e., surface on the compound semiconductor side) at the separation zones under the condition that a compound semiconductor layer is present on the top surface of the substrate.
    Type: Application
    Filed: May 24, 2010
    Publication date: September 16, 2010
    Applicant: SHOWA DENKO K.K
    Inventor: Katsuki KUSUNOKI
  • Patent number: 7772605
    Abstract: An object of the present invention is to provide a compound semiconductor light-emitting device having side surfaces of large surface area to improve the efficiency for outwardly transmitting the emitted light. Another object of the present invention is to provide a technology capable of easily forming the side surfaces with large surface area without using a cutting tool and without the need of taking a trouble to impart mechanical damage. The inventive compound semiconductor light-emitting device has a light-emitting layer, on a substrate, wherein at least a part of a substrate portion of the device side surface has recessed portions in a side direction of the device.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: August 10, 2010
    Assignee: Showa Denko K.K.
    Inventor: Katsuki Kusunoki
  • Patent number: 7700413
    Abstract: The inventive production method of a compound semiconductor light-emitting device (LED)s wafer comprises a step of forming a protective film on the top and/or bottom surface of a compound semiconductor LEDs wafer, where the devices being regularly and periodically arranged with separation zones being disposed; a step of forming separation grooves by means of laser processing in the separation zones of the surface on which the protective film is formed, while a gas is blown onto a laser-irradiated portion; and a step of removing at least a portion of the protective film, which steps are performed in the above sequence.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: April 20, 2010
    Assignee: Showa Denko K.K.
    Inventor: Katsuki Kusunoki
  • Patent number: 7652299
    Abstract: A nitride semiconductor light-emitting device includes a substrate and a nitride semiconductor layer including a light-emitting layer stacked on the substrate, wherein a normal line relative to a lateral face of the nitride semiconductor layer is not perpendicular to a normal line relative to a principal plane of the substrate. A method for the production of a nitride semiconductor light-emitting device that includes a substrate and a nitride semiconductor layer including a light-emitting layer stacked on the substrate includes the steps of covering a first surface of the nitride semiconductor layer with a mask provided with a prescribed pattern, removing the nitride semiconductor layer in regions to be divided into component devices till the substrate, subjecting the nitride semiconductor layer to wet-etching treatment and dividing the nitride semiconductor layer into the component devices.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: January 26, 2010
    Assignee: Showa Denko K.K.
    Inventors: Yasuhito Urashima, Katsuki Kusunoki
  • Patent number: 7576365
    Abstract: A Group III nitride semiconductor light-emitting device having a stacked structure includes a transparent crystal substrate having a front surface and a back surface, a first Group III nitride semiconductor layer of first conductive type formed on the front surface of the transparent crystal substrate, a second Group III nitride semiconductor layer of second conductive type which is opposite from the first conductive type, a light-emitting layer made of a Group III nitride semiconductor between the first and second Group III nitride semiconductor layers, and a plate body including fluorescent material, attached onto the back surface of the transparent crystal substrate.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: August 18, 2009
    Assignee: Showa Denko K.K.
    Inventors: Kazuhiro Mitani, Takashi Udagawa, Katsuki Kusunoki
  • Patent number: 7498184
    Abstract: An object of the present invention is to provide a method of producing a Group III nitride semiconductor device having a chip form which is pentagonal or more highly polygonal maintaining good area efficiency and at a low cost. The inventive method of producing a Group III nitride semiconductor device having a chip shape which is a pentagonal or more highly polygonal shape comprises a first step of epitaxially growing a Group III nitride semiconductor on a substrate to form a semiconductor wafer; a second step of irradiating said semiconductor wafer with a laser beam to form separation grooves; a third step of grinding and/or polishing the main surface side differently from the epitaxially grown main surface of the substrate; and a fourth step of division into individual chips by applying stress to said separation grooves.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: March 3, 2009
    Assignee: Showa Denko K.K.
    Inventors: Kenji Yakushiji, Katsuki Kusunoki, Hisayuki Miki
  • Patent number: 7495261
    Abstract: A Group III nitride semiconductor light-emitting device includes a stacked structure 11 formed on a crystal substrate (100) to be removed from it and including two Group III nitride semiconductor layers 104 and 106 having different electric conductive types and a light-emitting layer 105 which is stacked between the two Group III nitride semiconductor layers and which includes a Group III nitride semiconductor, and a plate body 111made of material different from that of the crystal substrate and formed on a surface of an uppermost layer which is opposite from the crystal substrate that is removed from the stacked structure.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: February 24, 2009
    Assignee: Showa Denko K.K.
    Inventors: Katsuki Kusunoki, Kazuhiro Mitani, Takashi Udagawa
  • Publication number: 20080070380
    Abstract: An object of the present invention is to provide a method for producing a compound semiconductor device wafer, which method enables cleaving of a wafer with precision and at remarkably high yield, attains high process speed, and improves productivity. The inventive method for producing a compound semiconductor device wafer, the wafer including a substrate and a plurality of compound semiconductor devices provided on the substrate and arranged with separation zones being disposed between the compound semiconductor devices, comprises a step of forming separation grooves, through laser processing, on the top surface of the substrate (i.e., surface on the compound semiconductor side) at the separation zones under the condition that a compound semiconductor layer is present on the top surface of the substrate.
    Type: Application
    Filed: June 8, 2005
    Publication date: March 20, 2008
    Applicant: SHOWDA DENKO K.K.
    Inventor: Katsuki Kusunoki
  • Publication number: 20070278509
    Abstract: A Group III nitride semiconductor light-emitting device includes a stacked structure 11 formed on a crystal substrate (100) to be removed from it and including two Group III nitride semiconductor layers 104 and 106 having different electric conductive types and a light-emitting layer 105 which is stacked between the two Group III nitride semiconductor layers and which includes a Group III nitride semiconductor, and a plate body 111 made of material different from that of the crystal substrate and formed on a surface of an uppermost layer which is opposite from the crystal substrate that is removed from the stacked structure.
    Type: Application
    Filed: March 17, 2005
    Publication date: December 6, 2007
    Inventors: Katsuki Kusunoki, Kazuhiro Mitani, Takashi Udagawa