Patents by Inventor Katsuko Tomita

Katsuko Tomita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor circuit designing method, semiconductor circuit designing apparatus, program, and semiconductor device
    Patent number: 7051311
    Abstract: The present invention provides a semiconductor circuit designing method, comprising a lower level hierarchical designing step of designing a semiconductor circuit inside a block and an upper level hierarchical designing step of designing an external wiring of the block. The above-mentioned lower level hierarchical designing step or upper level hierarchical designing step includes a shield wiring designing step of designing to provide a shield wiring on a boundary part of the block.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: May 23, 2006
    Assignee: Fujitsu Limited
    Inventors: Katsuko Tomita, Toshiaki Sugioka, Katsutoshi Baba
  • Semiconductor circuit designing method, semiconductor circuit designing apparatus, program, and semiconductor device
    Publication number: 20030237070
    Abstract: The present invention provides a semiconductor circuit designing method, comprising a lower level hierarchical designing step of designing a semiconductor circuit inside a block and an upper level hierarchical designing step of designing an external wiring of the block. The above-mentioned lower level hierarchical designing step or upper level hierarchical designing step includes a shield wiring designing step of designing to provide a shield wiring on a boundary part of the block.
    Type: Application
    Filed: May 28, 2003
    Publication date: December 25, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Katsuko Tomita, Toshiaki Sugioka, Katsutoshi Baba