Abstract: To reduce power consumption of a semiconductor device, the semiconductor device is configured to include: a power supplier for outputting multiple different voltages; a power controller for outputting a control signal to cause the power supplier to output one of the multiple voltages; a voltage controlling target block for outputting an error detection signal indicating an operation state, in accordance with the multiple voltages; and an error detector for monitoring the operation of the voltage controlling target block. The error detector determines, based on the error detection signal, whether the operation of the voltage controlling target block is normal, and informs the power controller of the obtained determination result. Further, based on a voltage indicated by a control signal and on the determination result from the error detector, the power controller determines a voltage controlling target block voltage to be supplied to the voltage controlling target block.

Abstract: In a CDMA receiver comprising a searcher for preparing a delay profile to produce path information identifying main propagation paths, a path monitor monitors the path information from the searcher to produce a detection signal when the main propagation paths are stable for a predetermined time interval. Responsive to the detection signal, a searcher operation controller controls the searcher to make the searcher intermittently operate at a predetermined intermittent period. The path monitor includes a path information memory for storing current path information from the searcher as stored path information and a path comparator for comparing the stored path information with the current path information. The path comparator produces a path coincidence signal when the stored path information coincides with the current path information. The path comparator produces a path inconsistency signal when the stored path information coincides with the current path information.

Abstract: In a digital radio communication system for wireless bidirectional communication between a master station and a slave station, each of the master station and the slave station includes a antenna, a subscriber interface, a first signal processing circuit for converting a first continuous data signal from the subscriber interface into a first burst digital signal and allocating it to a first predetermined time slot, a single modulation circuit for modulating the output signal of the first signal processing circuit and transmitting a modulated signal to the antenna, a single demodulation circuit for demodulating a signal from the antenna and generating a second burst digital signal; and a second signal processing circuit for converting a demodulated signal of a second predetermined time slot into a second continuous data signal and transmitting it to the subscriber interface.

Abstract: In a CDMA receiver comprising a searcher for preparing a delay profile to produce path information identifying main propagation paths, a path monitor monitors the path information from the searcher to produce a detection signal when the main propagation paths are stable for a predetermined time interval. Responsive to the detection signal, a searcher operation controller controls the searcher to make the searcher intermittently operate at a predetermined intermittent period. The path monitor includes a path information memory for storing current path information from the searcher as stored path information and a path comparator for comparing the stored path information with the current path information. The path comparator produces a path coincidence signal when the stored path information coincides with the current path information. The path comparator produces a path inconsistency signal when the stored path information coincides with the current path information.

Abstract: A data variation detecting system can perform detection of data variation at an arbitrary timing without lowering process performance of a processing unit, and without requiring expansion of a memory region in the processing unit. In the data variation detecting system, a recent data and a preceding data are taken from a shift register, are compared by a comparator circuit for detecting whether data variation is present or not by a data variation detecting circuit. The recent data is stored in a memory of an interface circuit with a data holding circuit. A result of detection by the data variation detecting system is directly stored in the memory in the interface circuit. When data variation is detected, operation of storing the recent data by the shift register and the data holding circuit is disabled via a masking circuit. The occurrence of data variation is detected by the processing unit via the interface circuit, the processing unit obtains the recent data from the interface circuit.

Abstract: Wireless TDMA communication equipment for a remote station which does not require inner temperature control circuit in order to control the temperature, comprising battery saving control circuit wherein the signal indicating whether or not a signal from a two-wire/four-wire converter exists and an output from a temperature sensor is received, when the signal to be transmitted to the wireless communication equipment does not exist, a time for intermittently operating the power source supplied to the wireless communication equipment is changed according to the output from the temperature sensor, and a temperature control portion having data rate control circuit wherein when the signal to be transmitted exists, the battery saving circuit is stopped, so that a coding rate of the wireless communication equipment and a transmission burst time are changed according to the temperature detecting circuit.

Abstract: A temperature control system for an electronic apparatus including a temperature sensor for detecting the temperature in the apparatus and outputting a temperature detection signal representing the detected temperature, a power supplier controller for generating a battery saving period signal having a pulse width which is inversely proportional to the level of the temperature detection signal from the temperature sensor, and a power supplier for supplying power to an internal apparatus for only a time corresponding to the pulse width of the battery saving period signal from the power supplier controller.