Abstract: A solid-state imaging device includes: a pixel unit which includes a plurality of pixels arranged in rows and columns and which generates pixel signals according to an amount of incident light; a column analog-to-digital converter (ADC) which is disposed for each of the columns of the pixel unit and which performs digital conversion on each of the pixel signals output from the pixels in the column; a timing control unit which generates a control signal for controlling the digital conversion performed by the column ADC; and a logic swing and delay adjusting circuit which is disposed in a signal path for supplying the control signal from the timing control unit to the column ADC and which at least either reduces an amplitude of the control signal or delays the control signal.

Abstract: A solid-state imaging device includes: a pixel unit which includes a plurality of pixels arranged in rows and columns and which generates pixel signals according to an amount of incident light; a column analog-to-digital converter (ADC) which is disposed for each of the columns of the pixel unit and which performs digital conversion on each of the pixel signals output from the pixels in the column; a timing control unit which generates a control signal for controlling the digital conversion performed by the column ADC; and a logic swing and delay adjusting circuit which is disposed in a signal path for supplying the control signal from the timing control unit to the column ADC and which at least either reduces an amplitude of the control signal or delays the control signal.

Abstract: A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.

Abstract: A presented semiconductor integrated circuit, which processes an RF signal, achieves preferable distortion characteristics even at the low supply voltage. It includes an attenuator configured to attenuate an input signal with a variable attenuation, a source follower configured to receive an output of the attenuator, and an amplifying unit configured to perform a filtering process on an output of the source follower, and then amplify the output of the source follower with a variable gain.

Abstract: A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.

Abstract: In a broadband low-noise amplifier circuit to be used in a multichannel reception system, a capacitance of a variable capacitor (9) is controlled by a resonance frequency control circuit (4) so that a resonance frequency of a load unit (2) comprising the variable capacitor (9) and an inductor (10) matches a desired RF signal frequency. Therefore, high gain and broadband can be realized at the same time without increasing power consumption, and consequently, a reception system having reduced power consumption and high sensitivity for all channels can be realized.

Abstract: A variable gain amplification circuit comprises a signal generator that has an output terminal and is able to vary an output amplitude; a variable capacitor connected between the output terminal and an AC grounded terminal; and a control circuit for controlling the output amplitude of the signal generator, and a capacitance of the variable capacitor. Therefore, unnecessary signals can be attenuated even when the gain is low, and degradation in distortion characteristics in the latter block can be suppressed.

Abstract: A mixer circuit of a receiving system, requiring low noise characteristics at lower frequency, includes a bypass current source (41) which is connected in parallel with an LO transistor (21) between an IF output terminal (33) and a drain terminal of an RF transistor (11), and a bypass current source (42) which is connected in parallel with an LO transistor (22) between an IF output terminal (34) and the drain terminal of the RF transistor (11), thereby decreasing a current flowing through the LO transistors (21, 22) without decreasing a bias current flowing through the RF transistor (11). Accordingly, it is possible to suppress flicker noises occurring from the LO transistors (21, 22) without lowering the gain of the mixer, thereby realizing a mixer circuit with excellent low frequency noise characteristics, which can improve the NF characteristics at lower frequency.

Abstract: A pseudo-image signal producing section produces a pseudo-image signal imitating an actual image signal. An amplitude detection section detects the amplitude of the pseudo-image signal having passed through a complex filter circuit. A filter control section controls an element value control section in the complex filter circuit so as to decrease the detected amplitude. The element value control section performs an element value adjustment so that absolute element values of a pair of elements corresponding to each other in two filter circuits in the complex filter circuit increase/decrease in opposite directions.

Abstract: A multi-channel radio signal processing integrated circuit (10A) includes: an analog signal processing unit (101) for generating a local signal based on an externally supplied reference clock signal and selecting a desired channel from the multi-channel radio signal using the local signal; a digital signal processing unit (102) for performing digital demodulation of a signal of the channel selected by the analog signal processing unit (101); an operation clock generating unit (103) for generating an operation clock signal for the digital signal processing unit (102); and a control unit (104) for designating a frequency of the operation clock signal to be generated by the operation clock generating unit (103) in response the channel selected by the analog signal processing unit (101).

Abstract: In a broadband low-noise amplifier circuit to be used in a multichannel reception system, a capacitance of a variable capacitor (9) is controlled by a resonance frequency control circuit (4) so that a resonance frequency of a load unit (2) comprising the variable capacitor (9) and an inductor (10) matches a desired RF signal frequency. Therefore, high gain and broadband can be realized at the same time without increasing power consumption, and consequently, a reception system having reduced power consumption and high sensitivity for all channels can be realized.

Abstract: A mixer circuit of a receiving system, requiring low noise characteristics at lower frequency, includes a bypass current source (41) which is connected in parallel with an LO transistor (21) between an IF output terminal (33) and a drain terminal of an RF transistor (11), and a bypass current source (42) which is connected in parallel with an LO transistor (22) between an IF output terminal (34) and the drain terminal of the RF transistor (11), thereby decreasing a current flowing through the LO transistors (21, 22) without decreasing a bias current flowing through the RF transistor (11). Accordingly, it is possible to suppress flicker noises occurring from the LO transistors (21, 22) without lowering the gain of the mixer, thereby realizing a mixer circuit with excellent low frequency noise characteristics, which can improve the NF characteristics at lower frequency.

Abstract: A pseudo-image signal producing section produces a pseudo-image signal imitating an actual image signal. An amplitude detection section detects the amplitude of the pseudo-image signal having passed through a complex filter circuit. A filter control section controls an element value control section in the complex filter circuit so as to decrease the detected amplitude. The element value control section performs an element value adjustment so that absolute element values of a pair of elements corresponding to each other in two filter circuits in the complex filter circuit increase/decrease in opposite directions.

Abstract: A variable gain amplification circuit comprises a signal generator that has an output terminal and is able to vary an output amplitude; a variable capacitor connected between the output terminal and an AC grounded terminal; and a control circuit for controlling the output amplitude of the signal generator, and a capacitance of the variable capacitor. Therefore, unnecessary signals can be attenuated even when the gain is low, and degradation in distortion characteristics in the latter block can be suppressed.

Abstract: An analog-digital hybrid IC device for reducing cross-talk adds an electrostatic capacitance element to the power supply side and/or the ground side of a CMOS logic circuit forming the digital circuit part, connects a resistance between the electrostatic capacitance element and the terminal to which the electrostatic capacitance element was added, and buffers charging and discharging when the logic elements switch on and off to reduce noise produced by current peaks.