Patents by Inventor Katsumasa Uchiyama

Katsumasa Uchiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180322079
    Abstract: An object is to obtain output data corresponding to input data by referring to table data by a semiconductor apparatus having a simple configuration. An MCU includes a DTC for transferring data from a source address region to a destination address region based on data transfer information in response to a startup request. The DTC performs an operation on second source address information based on data that has been read from first source address information, performs reading based on a result of the operation, and writes read data based on destination address information.
    Type: Application
    Filed: July 12, 2018
    Publication date: November 8, 2018
    Inventors: Naoki Mitsuishi, Seiji Ikari, Katsumasa Uchiyama
  • Patent number: 10049063
    Abstract: An object is to obtain output data corresponding to input data by referring to table data by a semiconductor apparatus having a simple configuration. An MCU includes a DTC for transferring data from a source address region to a destination address region based on data transfer information in response to a startup request. The DTC performs an operation on second source address information based on data that has been read from first source address information, performs reading based on a result of the operation, and writes read data based on destination address information.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: August 14, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Naoki Mitsuishi, Seiji Ikari, Katsumasa Uchiyama
  • Publication number: 20150193367
    Abstract: An object is to obtain output data corresponding to input data by referring to table data by a semiconductor apparatus having a simple configuration. An MCU includes a DTC for transferring data from a source address region to a destination address region based on data transfer information in response to a startup request. The DTC performs an operation on second source address information based on data that has been read from first source address information, performs reading based on a result of the operation, and writes read data based on destination address information.
    Type: Application
    Filed: December 30, 2014
    Publication date: July 9, 2015
    Inventors: Naoki Mitsuishi, Seiji Ikari, Katsumasa Uchiyama
  • Patent number: 8214670
    Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: July 3, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hiromichi Ishikura, Toyohiro Shimogawa, Katsumasa Uchiyama, Shoichiro Chiba, Naoki Handa
  • Publication number: 20100275048
    Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.
    Type: Application
    Filed: July 8, 2010
    Publication date: October 28, 2010
    Inventors: HIROMICHI ISHIKURA, Toyohiro Shimogawa, Katsumasa Uchiyama, Shoichiro Chiba, Naoki Handa
  • Patent number: 7765415
    Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: July 27, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Hiromichi Ishikura, Toyohiro Shimogawa, Katsumasa Uchiyama, Shoichiro Chiba, Naoki Handa
  • Publication number: 20080034242
    Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.
    Type: Application
    Filed: July 18, 2007
    Publication date: February 7, 2008
    Inventors: Hiromichi Ishikura, Toyohiro Shimogawa, Katsumasa Uchiyama, Shoichiro Chiba, Naoki Handa