Abstract: A semiconductor device includes a semiconductor substrate, a trench capacitor arranged on the semiconductor substrate, a first wiring layer, a second wiring layer, a first TSV penetrating the semiconductor substrate outside the trench capacitor, a second TSV penetrating the semiconductor substrate outside the trench capacitor, a first connecting terminal connected to the first TSV, a second connecting terminal connected to the first TSV, a third connecting terminal connected to the second TSV, and a fourth connecting terminal connected to the second TSV. A plurality of connecting terminals including the first through fourth connecting terminals are arranged dispersively over an entire area of the first wiring layer and the second wiring layer of the semiconductor device, thereby stabilizing voltage supplied to an image unit and achieving a stable image signal.

Abstract: A semiconductor device includes a semiconductor substrate, a trench capacitor arranged on the semiconductor substrate, a first wiring layer, a second wiring layer, a first TSV penetrating the semiconductor substrate outside the trench capacitor, a second TSV penetrating the semiconductor substrate outside the trench capacitor, a first connecting terminal connected to the first TSV, a second connecting terminal connected to the first TSV, a third connecting terminal connected to the second TSV, and a fourth connecting terminal connected to the second TSV. A plurality of connecting terminals including the first through fourth connecting terminals are arranged dispersively over an entire area of the first wiring layer and the second wiring layer of the semiconductor device, thereby stabilizing voltage supplied to an image unit and achieving a stable image signal.

Abstract: An imaging element includes: a pixel chip where a pixel unit and a vertical selecting unit are arranged, the pixel unit including plural pixels that are arranged in a two-dimensional matrix, the pixels being configured to generate and output imaging signals; a transmission chip where at least a power source unit and a transmission unit are arranged; plural capacitative chips, each capacitative chip having capacitance functioning as a bypass condenser for a power source in the power source unit; and plural connecting portions configured to electrically connect the pixel chip, the transmission chip, and the capacitative chip respectively to another chip. The transmission chip is layered and connected at a back surface side of the pixel chip. The capacitative chips are layered and connected at a back surface side of the transmission chip. The connecting portions are arranged so as to overlap one another.

Abstract: An imaging device includes: a first chip including a light receiving unit, and a read circuit; a second chip including a timing control circuit, an A/D conversion circuit, and a cable transmission circuit; and a connection unit configured to connect the first and the second chips. The read circuit includes a column read circuit and a horizontal selection circuit, and a vertical selection circuit. The connection unit of the first chip is provided in a first area along a side of the rectangular light receiving unit, and in a second area adjacent to the column read circuit, the horizontal selection circuit, and the vertical selection circuit. The connection unit of the second chip is provided in a third area around the timing control circuit, the A/D conversion circuit, and the cable transmission circuit and in a fourth area adjacent to the timing control circuit and the A/D conversion circuit.

Abstract: An imaging element includes: a pixel chip where a pixel unit and a vertical selecting unit are arranged, the pixel unit including plural pixels that are arranged in a two-dimensional matrix, the pixels being configured to generate and output imaging signals; a transmission chip where at least a power source unit and a transmission unit are arranged; plural capacitative chips, each capacitative chip having capacitance functioning as a bypass condenser for a power source in the power source unit; and plural connecting portions configured to electrically connect the pixel chip, the transmission chip, and the capacitative chip respectively to another chip. The transmission chip is layered and connected at a back surface side of the pixel chip. The capacitative chips are layered and connected at a back surface side of the transmission chip. The connecting portions are arranged so as to overlap one another.

Abstract: An imaging device includes: a first chip including a light receiving unit, and a read circuit; a second chip including a timing control circuit, an A/D conversion circuit, and a cable transmission circuit; and a connection unit configured to connect the first and the second chips. The read circuit includes a column read circuit and a horizontal selection circuit, and a vertical selection circuit. The connection unit of the first chip is provided in a first area along a side of the rectangular light receiving unit, and in a second area adjacent to the column read circuit, the horizontal selection circuit, and the vertical selection circuit. The connection unit of the second chip is provided in a third area around the timing control circuit, the A/D conversion circuit, and the cable transmission circuit and in a fourth area adjacent to the timing control circuit and the A/D conversion circuit.

Abstract: An imaging element includes: a plurality of pixels arranged into a two-dimensional matrix, configured to receive light from outside, and configured to generate and output an imaging signal according to an amount of light received; a first transfer line connected to the pixel and configured to transfer the imaging signal; a pixel selection unit configured to perform a selection operation of selecting a selection target pixel from among the plurality of pixels in order to read the imaging signal out to the first transfer line and a de-selection operation of canceling the selection of the pixel being selected; and control unit configured to control the pixel selection unit. The control unit performs the selection operation of selecting a new selection target pixel after performing the de-selection operation on the basis of a synchronization signal from outside.

Abstract: An imaging element includes: a plurality of pixels; first vertical transfer lines; a second vertical transfer line; a reference voltage generator configured to generate a first reference voltage for a column-black reference signal, a second reference voltage for a line-black reference signal and a third reference voltage for phase adjustment; a phase adjusting signal generator configured to output a phase adjusting signal corresponding to the third reference voltage; a first reference signal generator configured to generate a column-black reference signal corresponding to the first reference voltage; a second reference signal generator configured to generate a line-black reference signal corresponding to the second reference voltage; and a timing generator configured to drive the phase adjusting signal generator, the first reference signal generator and the second reference signal generator to transmit the phase adjusting signal, the column-black reference signal and the line-black reference signal, respectiv

Abstract: An imaging element includes: a plurality of pixels; first vertical transfer lines; a second vertical transfer line; a reference voltage generator configured to generate a first reference voltage for a column-black reference signal, a second reference voltage for a line-black reference signal and a third reference voltage for phase adjustment; a phase adjusting signal generator configured to output a phase adjusting signal corresponding to the third reference voltage; a first reference signal generator configured to generate a column-black reference signal corresponding to the first reference voltage; a second reference signal generator configured to generate a line-black reference signal corresponding to the second reference voltage; and a timing generator configured to drive the phase adjusting signal generator, the first reference signal generator and the second reference signal generator to transmit the phase adjusting signal, the column-black reference signal and the line-black reference signal, respectiv

Abstract: An imaging element includes: a plurality of pixels arranged into a two-dimensional matrix, configured to receive light from outside, and configured to generate and output an imaging signal according to an amount of light received; a first transfer line connected to the pixel and configured to transfer the imaging signal; a pixel selection unit configured to perform a selection operation of selecting a selection target pixel from among the plurality of pixels in order to read the imaging signal out to the first transfer line and a de-selection operation of canceling the selection of the pixel being selected; and control unit configured to control the pixel selection unit. The control unit performs the selection operation of selecting a new selection target pixel after performing the de-selection operation on the basis of a synchronization signal from outside.